sh: remove voyagergx (29ec6778) · Commits · e / devices / android_kernel_xiaomi_markw

arch/sh/Makefile

+0 −1

Original line number	Diff line number	Diff line
		@@ -138,7 +138,6 @@ endif

		# Companion chips
		core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/
		core-$(CONFIG_MFD_SM501) += arch/sh/cchips/voyagergx/

		cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2
		cpuincdir-$(CONFIG_CPU_SH2A) := cpu-sh2a

arch/sh/boards/renesas/rts7751r2d/irq.c

+0 −4

Original line number	Diff line number	Diff line
		@@ -13,7 +13,6 @@
		#include <linux/irq.h>
		#include <linux/interrupt.h>
		#include <linux/io.h>
		#include <asm/voyagergx.h>
		#include <asm/rts7751r2d.h>

		#define R2D_NR_IRL 13
		@@ -153,7 +152,4 @@ void __init init_rts7751r2d_IRQ(void)
		}

		register_intc_controller(d);
		#ifdef CONFIG_MFD_SM501
		setup_voyagergx_irq();
		#endif
		}

arch/sh/boards/renesas/rts7751r2d/setup.c

+39 −34

Original line number	Diff line number	Diff line
		@@ -13,36 +13,13 @@
		#include <linux/pata_platform.h>
		#include <linux/serial_8250.h>
		#include <linux/sm501.h>
		#include <linux/sm501-regs.h>
		#include <linux/pm.h>
		#include <linux/fb.h>
		#include <asm/machvec.h>
		#include <asm/rts7751r2d.h>
		#include <asm/voyagergx.h>
		#include <asm/io.h>

		static void __init voyagergx_serial_init(void)
		{
		unsigned long val;

		/*
		* GPIO Control
		*/
		val = readl((void __iomem *)GPIO_MUX_HIGH);
		val \|= 0x00001fe0;
		writel(val, (void __iomem *)GPIO_MUX_HIGH);

		/*
		* Power Mode Gate
		*/
		val = readl((void __iomem *)POWER_MODE0_GATE);
		val \|= (POWER_MODE0_GATE_U0 \| POWER_MODE0_GATE_U1);
		writel(val, (void __iomem *)POWER_MODE0_GATE);

		val = readl((void __iomem *)POWER_MODE1_GATE);
		val \|= (POWER_MODE1_GATE_U0 \| POWER_MODE1_GATE_U1);
		writel(val, (void __iomem *)POWER_MODE1_GATE);
		}

		static struct resource cf_ide_resources[] = {
		[0] = {
		.start = PA_AREA5_IO + 0x1000,
		@@ -94,11 +71,11 @@ static struct platform_device heartbeat_device = {
		#ifdef CONFIG_MFD_SM501
		static struct plat_serial8250_port uart_platform_data[] = {
		{
		.membase = (void __iomem *)VOYAGER_UART_BASE,
		.mapbase = VOYAGER_UART_BASE,
		.membase = (void __iomem *)0xb3e30000,
		.mapbase = 0xb3e30000,
		.iotype = UPIO_MEM,
		.irq = IRQ_SM501_U0,
		.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST,
		.irq = IRQ_VOYAGER,
		.flags = UPF_BOOT_AUTOCONF \| UPF_SHARE_IRQ,
		.regshift = 2,
		.uartclk = (9600 * 16),
		},
		@@ -125,7 +102,7 @@ static struct resource sm501_resources[] = {
		.flags = IORESOURCE_MEM,
		},
		[2] = {
		.start = IRQ_SM501_CV,
		.start = IRQ_VOYAGER,
		.flags = IORESOURCE_IRQ,
		},
		};
		@@ -167,7 +144,15 @@ static struct sm501_platdata_fb sm501_fb_pdata = {
		.flags = SM501_FBPD_SWAP_FB_ENDIAN,
		};

		static struct sm501_initdata sm501_initdata = {
		.gpio_high = {
		.set = 0x00001fe0,
		.mask = 0x0,
		},
		};

		static struct sm501_platdata sm501_platform_data = {
		.init = &sm501_initdata,
		.fb = &sm501_fb_pdata,
		};

		@@ -237,6 +222,7 @@ u8 rts7751r2d_readb(void __iomem *addr)
		*/
		static void __init rts7751r2d_setup(char **cmdline_p)
		{
		void __iomem *sm501_reg;
		u16 ver = ctrl_inw(PA_VERREG);

		printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
		@@ -247,7 +233,30 @@ static void __init rts7751r2d_setup(char **cmdline_p)
		ctrl_outw(0x0000, PA_OUTPORT);
		pm_power_off = rts7751r2d_power_off;

		voyagergx_serial_init();
		/* sm501 dram configuration:
		* ColSizeX = 11 - External Memory Column Size: 256 words.
		* APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks.
		* RstX = 1 - External Memory Reset: Normal.
		* Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks.
		* BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks.
		* BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock.
		* AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks.
		* Rst = 1 - Internal Memory Reset: Normal.
		* RA = 1 - Internal Memory Remain in Active State: Do not remain.
		*/

		sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
		writel(readl(sm501_reg) \| 0x00f107c0, sm501_reg);

		/*
		* Power Mode Gate - Enable UART0
		*/

		sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_0_GATE;
		writel(readl(sm501_reg) \| (1 << SM501_GATE_UART0), sm501_reg);

		sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_1_GATE;
		writel(readl(sm501_reg) \| (1 << SM501_GATE_UART0), sm501_reg);
		}

		/*
		@@ -260,8 +269,4 @@ static struct sh_machine_vector mv_rts7751r2d __initmv = {
		.mv_irq_demux = rts7751r2d_irq_demux,
		.mv_writeb = rts7751r2d_writeb,
		.mv_readb = rts7751r2d_readb,
		#if defined(CONFIG_MFD_SM501) && defined(CONFIG_USB_OHCI_HCD)
		.mv_consistent_alloc = voyagergx_consistent_alloc,
		.mv_consistent_free = voyagergx_consistent_free,
		#endif
		};

arch/sh/cchips/voyagergx/Makefile

deleted100644 → 0

+0 −9

Original line number	Diff line number	Diff line
		#
		# Makefile for VoyagerGX
		#

		obj-y := irq.o setup.o

		obj-$(CONFIG_USB_OHCI_HCD) += consistent.o

		EXTRA_CFLAGS += -Werror

arch/sh/cchips/voyagergx/consistent.c

deleted100644 → 0

+0 −121

Original line number	Diff line number	Diff line
		/*
		* arch/sh/cchips/voyagergx/consistent.c
		*
		* Copyright (C) 2004 Paul Mundt
		*
		* This file is subject to the terms and conditions of the GNU General Public
		* License. See the file "COPYING" in the main directory of this archive
		* for more details.
		*/
		#include <linux/mm.h>
		#include <linux/dma-mapping.h>
		#include <linux/slab.h>
		#include <linux/list.h>
		#include <linux/types.h>
		#include <linux/module.h>
		#include <linux/device.h>
		#include <asm/io.h>


		struct voya_alloc_entry {
		struct list_head list;
		unsigned long ofs;
		unsigned long len;
		};

		static DEFINE_SPINLOCK(voya_list_lock);
		static LIST_HEAD(voya_alloc_list);

		#define OHCI_SRAM_START 0xb0000000
		#define OHCI_HCCA_SIZE 0x100
		#define OHCI_SRAM_SIZE 0x10000

		#define VOYAGER_OHCI_NAME "voyager-ohci"

		void voyagergx_consistent_alloc(struct device dev, size_t size,
		dma_addr_t *handle, gfp_t flag)
		{
		struct list_head *list = &voya_alloc_list;
		struct voya_alloc_entry *entry;
		unsigned long start, end;
		unsigned long flags;

		/*
		* The SM501 contains an integrated 8051 with its own SRAM.
		* Devices within the cchip can all hook into the 8051 SRAM.
		* We presently use this for the OHCI.
		*
		* Everything else goes through consistent_alloc().
		*/
		if (!dev \|\| strcmp(dev->driver->name, VOYAGER_OHCI_NAME))
		return NULL;

		start = OHCI_SRAM_START + OHCI_HCCA_SIZE;

		entry = kmalloc(sizeof(struct voya_alloc_entry), GFP_ATOMIC);
		if (!entry)
		return ERR_PTR(-ENOMEM);

		entry->len = (size + 15) & ~15;

		/*
		* The basis for this allocator is dwmw2's malloc.. the
		* Matrox allocator :-)
		*/
		spin_lock_irqsave(&voya_list_lock, flags);
		list_for_each(list, &voya_alloc_list) {
		struct voya_alloc_entry *p;

		p = list_entry(list, struct voya_alloc_entry, list);

		if (p->ofs - start >= size)
		goto out;

		start = p->ofs + p->len;
		}

		end = start + (OHCI_SRAM_SIZE - OHCI_HCCA_SIZE);
		list = &voya_alloc_list;

		if (end - start >= size) {
		out:
		entry->ofs = start;
		list_add_tail(&entry->list, list);
		spin_unlock_irqrestore(&voya_list_lock, flags);

		*handle = start;
		return (void *)start;
		}

		kfree(entry);
		spin_unlock_irqrestore(&voya_list_lock, flags);

		return ERR_PTR(-EINVAL);
		}

		int voyagergx_consistent_free(struct device *dev, size_t size,
		void *vaddr, dma_addr_t handle)
		{
		struct voya_alloc_entry *entry;
		unsigned long flags;

		if (!dev \|\| strcmp(dev->driver->name, VOYAGER_OHCI_NAME))
		return -EINVAL;

		spin_lock_irqsave(&voya_list_lock, flags);
		list_for_each_entry(entry, &voya_alloc_list, list) {
		if (entry->ofs != handle)
		continue;

		list_del(&entry->list);
		kfree(entry);

		break;
		}
		spin_unlock_irqrestore(&voya_list_lock, flags);

		return 0;
		}

		EXPORT_SYMBOL(voyagergx_consistent_alloc);
		EXPORT_SYMBOL(voyagergx_consistent_free);