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Commit 29b63fe2 authored by Charan Teja Reddy's avatar Charan Teja Reddy Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add the cti save-restore support on msm8937 



Add the CTI registers save-restore support that helps in context saving
of CTI when the LPM modes are enabled.

Change-Id: I2587beaaff8f85ea9150b38402a4fa7bd3b218bb
Signed-off-by: default avatarCharan Teja Reddy <charante@codeaurora.org>
parent 747b0f6a

arch/arm/boot/dts/qcom/msm8937-coresight.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -646,6 +646,8 @@ 
		coresight-nr-inports = <0>;

		coresight-cti-cpu = <&CPU0>;



		qcom,cti-save;



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";
@@ -661,6 +663,8 @@ 
		coresight-nr-inports = <0>;

		coresight-cti-cpu = <&CPU1>;



		qcom,cti-save;



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";
@@ -676,6 +680,8 @@ 
		coresight-nr-inports = <0>;

		coresight-cti-cpu = <&CPU2>;



		qcom,cti-save;



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";
@@ -691,6 +697,8 @@ 
		coresight-nr-inports = <0>;

		coresight-cti-cpu = <&CPU3>;



		qcom,cti-save;



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";
@@ -706,6 +714,8 @@ 
		coresight-nr-inports = <0>;

		coresight-cti-cpu = <&CPU4>;



		qcom,cti-save;



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";
@@ -721,6 +731,8 @@ 
		coresight-nr-inports = <0>;

		coresight-cti-cpu = <&CPU5>;



		qcom,cti-save;



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";
@@ -736,6 +748,8 @@ 
		coresight-nr-inports = <0>;

		coresight-cti-cpu = <&CPU6>;



		qcom,cti-save;



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";
@@ -751,6 +765,8 @@ 
		coresight-nr-inports = <0>;

		coresight-cti-cpu = <&CPU7>;



		qcom,cti-save;



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";