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Commit 2954c02a authored by Chen, Huacai's avatar Chen, Huacai Committed by Ralf Baechle
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[MIPS] modify the MIPS CPU classfication

parent 4d3702b6
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+2 −2
Original line number Diff line number Diff line
@@ -66,8 +66,10 @@
#define PRID_IMP_RM7000		0x2700
#define PRID_IMP_NEVADA		0x2800		/* RM5260 ??? */
#define PRID_IMP_RM9000		0x3400
#define PRID_IMP_LOONGSON1	0x4200
#define PRID_IMP_R5432		0x5400
#define PRID_IMP_R5500		0x5500
#define PRID_IMP_LOONGSON2	0x6300

#define PRID_IMP_UNKNOWN	0xff00

@@ -90,8 +92,6 @@
#define PRID_IMP_24KE		0x9600
#define PRID_IMP_74K		0x9700
#define PRID_IMP_1004K		0x9900
#define PRID_IMP_LOONGSON1      0x4200
#define PRID_IMP_LOONGSON2      0x6300

/*
 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE