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Commit 291b63c8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6:
  drm/i915: Cannot set clock gating under UMS
  drm/i915: Can't do accurate vblank timestamps with UMS
  Not all systems expose a firmware or platform mechanism for changing the backlight intensity on i915, so add native driver support.
  drm/i915: split out PCH refclk update code
  drm/i915: show interrupt info on IVB
  drm/i915: Remove unused 'reg' argument to dp_pipe_enabled
  drm/i915: Fix PCH port pipe select in CPT disable paths
  drm/i915: Leave LVDS registers unlocked
  drm/i915: Wait for LVDS panel power sequence
parents cedf03bd 92b79f43
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+1 −1
Original line number Diff line number Diff line
@@ -499,7 +499,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
	seq_printf(m, "Interrupts received: %d\n",
		   atomic_read(&dev_priv->irq_received));
	for (i = 0; i < I915_NUM_RINGS; i++) {
		if (IS_GEN6(dev)) {
		if (IS_GEN6(dev) || IS_GEN7(dev)) {
			seq_printf(m, "Graphics Interrupt mask (%s):	%08x\n",
				   dev_priv->ring[i].name,
				   I915_READ_IMR(&dev_priv->ring[i]));
+4 −0
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@
#include <linux/io-mapping.h>
#include <linux/i2c.h>
#include <drm/intel-gtt.h>
#include <linux/backlight.h>

/* General customization:
 */
@@ -690,6 +691,7 @@ typedef struct drm_i915_private {
	int child_dev_num;
	struct child_device_config *child_dev;
	struct drm_connector *int_lvds_connector;
	struct drm_connector *int_edp_connector;

	bool mchbar_need_disable;

@@ -723,6 +725,8 @@ typedef struct drm_i915_private {
	/* list of fbdev register on this device */
	struct intel_fbdev *fbdev;

	struct backlight_device *backlight;

	struct drm_property *broadcast_rgb_property;
	struct drm_property *force_audio_property;

+4 −2
Original line number Diff line number Diff line
@@ -2058,8 +2058,10 @@ void intel_irq_init(struct drm_device *dev)
		dev->driver->get_vblank_counter = gm45_get_vblank_counter;
	}


	if (drm_core_check_feature(dev, DRIVER_MODESET))
		dev->driver->get_vblank_timestamp = i915_get_vblank_timestamp;
	else
		dev->driver->get_vblank_timestamp = NULL;
	dev->driver->get_scanout_position = i915_get_crtc_scanoutpos;

	if (IS_IVYBRIDGE(dev)) {
+4 −9
Original line number Diff line number Diff line
@@ -1318,6 +1318,7 @@
#define   ADPA_PIPE_SELECT_MASK	(1<<30)
#define   ADPA_PIPE_A_SELECT	0
#define   ADPA_PIPE_B_SELECT	(1<<30)
#define   ADPA_PIPE_SELECT(pipe) ((pipe) << 30)
#define   ADPA_USE_VGA_HVPOLARITY (1<<15)
#define   ADPA_SETS_HVPOLARITY	0
#define   ADPA_VSYNC_CNTL_DISABLE (1<<11)
@@ -1460,6 +1461,7 @@
/* Selects pipe B for LVDS data.  Must be set on pre-965. */
#define   LVDS_PIPEB_SELECT		(1 << 30)
#define   LVDS_PIPE_MASK		(1 << 30)
#define   LVDS_PIPE(pipe)		((pipe) << 30)
/* LVDS dithering flag on 965/g4x platform */
#define   LVDS_ENABLE_DITHER		(1 << 25)
/* LVDS sync polarity flags. Set to invert (i.e. negative) */
@@ -1499,9 +1501,6 @@
#define   LVDS_B0B3_POWER_DOWN		(0 << 2)
#define   LVDS_B0B3_POWER_UP		(3 << 2)

#define LVDS_PIPE_ENABLED(V, P) \
	(((V) & (LVDS_PIPE_MASK | LVDS_PORT_EN)) == ((P) << 30 | LVDS_PORT_EN))

/* Video Data Island Packet control */
#define VIDEO_DIP_DATA		0x61178
#define VIDEO_DIP_CTL		0x61170
@@ -3256,14 +3255,12 @@
#define  ADPA_CRT_HOTPLUG_VOLREF_475MV  (1<<17)
#define  ADPA_CRT_HOTPLUG_FORCE_TRIGGER (1<<16)

#define ADPA_PIPE_ENABLED(V, P) \
	(((V) & (ADPA_TRANS_SELECT_MASK | ADPA_DAC_ENABLE)) == ((P) << 30 | ADPA_DAC_ENABLE))

/* or SDVOB */
#define HDMIB   0xe1140
#define  PORT_ENABLE    (1 << 31)
#define  TRANSCODER_A   (0)
#define  TRANSCODER_B   (1 << 30)
#define  TRANSCODER(pipe)	((pipe) << 30)
#define  TRANSCODER_MASK   (1 << 30)
#define  COLOR_FORMAT_8bpc      (0)
#define  COLOR_FORMAT_12bpc     (3 << 26)
@@ -3280,9 +3277,6 @@
#define  HSYNC_ACTIVE_HIGH      (1 << 3)
#define  PORT_DETECTED          (1 << 2)

#define HDMI_PIPE_ENABLED(V, P) \
	(((V) & (TRANSCODER_MASK | PORT_ENABLE)) == ((P) << 30 | PORT_ENABLE))

/* PCH SDVOB multiplex with HDMIB */
#define PCH_SDVOB	HDMIB

@@ -3349,6 +3343,7 @@
#define  PORT_TRANS_B_SEL_CPT	(1<<29)
#define  PORT_TRANS_C_SEL_CPT	(2<<29)
#define  PORT_TRANS_SEL_MASK	(3<<29)
#define  PORT_TRANS_SEL_CPT(pipe)	((pipe) << 29)

#define TRANS_DP_CTL_A		0xe0300
#define TRANS_DP_CTL_B		0xe1300
+2 −1
Original line number Diff line number Diff line
@@ -871,6 +871,7 @@ int i915_restore_state(struct drm_device *dev)
	}
	mutex_unlock(&dev->struct_mutex);

	if (drm_core_check_feature(dev, DRIVER_MODESET))
		intel_init_clock_gating(dev);

	if (IS_IRONLAKE_M(dev)) {
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