Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2916f9a2 authored by Heiko Stuebner's avatar Heiko Stuebner Committed by Kukjin Kim
Browse files

ARM: S3C24XX: remove SAMSUNG_CLOCK remnants after ccf conversion 



This finally removes all remaining SAMSUNG_CLOCK conditional code
from s3c24xx architectures.

Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent defd9da5

arch/arm/mach-s3c24xx/Kconfig

+0 −3
Original line number Diff line number Diff line
@@ -266,7 +266,6 @@ config ARCH_BAST 
	select MACH_BAST_IDE

	select S3C2410_COMMON_DCLK if COMMON_CLK

	select S3C2410_IOTIMING if ARM_S3C2410_CPUFREQ

	select S3C24XX_DCLK if SAMSUNG_CLOCK

	select S3C24XX_SIMTEC_NOR

	select S3C24XX_SIMTEC_PM if PM

	select S3C24XX_SIMTEC_USB
@@ -534,7 +533,6 @@ config MACH_ANUBIS 
	select HAVE_PATA_PLATFORM

	select S3C2410_COMMON_DCLK if COMMON_CLK

	select S3C2440_XTAL_12000000

	select S3C24XX_DCLK if SAMSUNG_CLOCK

	select S3C24XX_SIMTEC_PM if PM

	select S3C_DEV_USB_HOST

	help
@@ -575,7 +573,6 @@ config MACH_OSIRIS 
	select S3C2410_COMMON_DCLK if COMMON_CLK

	select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ

	select S3C2440_XTAL_12000000

	select S3C24XX_DCLK if SAMSUNG_CLOCK

	select S3C24XX_SIMTEC_PM if PM

	select S3C_DEV_NAND

	select S3C_DEV_USB_HOST

arch/arm/mach-s3c24xx/common.c

+0 −17
Original line number Diff line number Diff line
@@ -307,23 +307,6 @@ struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = { 
	},

};



/* initialise all the clocks */



#ifdef CONFIG_SAMSUNG_CLOCK

void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,

					   unsigned long hclk,

					   unsigned long pclk)

{

	clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON),

					clk_xtal.rate);



	clk_mpll.rate = fclk;

	clk_h.rate = hclk;

	clk_p.rate = pclk;

	clk_f.rate = fclk;

}

#endif



#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \

	defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)

static struct resource s3c2410_dma_resource[] = {

arch/arm/mach-s3c24xx/cpufreq-utils.c

+0 −6
Original line number Diff line number Diff line
@@ -61,12 +61,6 @@ void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) 
 */

void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg)

{

#ifdef CONFIG_SAMSUNG_CLOCK

	__raw_writel(cfg->pll.driver_data, S3C2410_MPLLCON);

#endif



#ifdef CONFIG_COMMON_CLK

	if (!IS_ERR(cfg->mpll))

		clk_set_rate(cfg->mpll, cfg->pll.frequency);

#endif

}

arch/arm/mach-s3c24xx/mach-anubis.c

+0 −27
Original line number Diff line number Diff line
@@ -364,16 +364,6 @@ static struct platform_device *anubis_devices[] __initdata = { 
	&anubis_device_sm501,

};



#ifdef CONFIG_SAMSUNG_CLOCK

static struct clk *anubis_clocks[] __initdata = {

	&s3c24xx_dclk0,

	&s3c24xx_dclk1,

	&s3c24xx_clkout0,

	&s3c24xx_clkout1,

	&s3c24xx_uclk,

};

#endif



/* I2C devices. */



static struct i2c_board_info anubis_i2c_devs[] __initdata = {
@@ -396,23 +386,6 @@ static struct s3c24xx_audio_simtec_pdata __initdata anubis_audio = { 


static void __init anubis_map_io(void)

{

#ifdef CONFIG_SAMSUNG_CLOCK

	/* initialise the clocks */



	s3c24xx_dclk0.parent = &clk_upll;

	s3c24xx_dclk0.rate   = 12*1000*1000;



	s3c24xx_dclk1.parent = &clk_upll;

	s3c24xx_dclk1.rate   = 24*1000*1000;



	s3c24xx_clkout0.parent  = &s3c24xx_dclk0;

	s3c24xx_clkout1.parent  = &s3c24xx_dclk1;



	s3c24xx_uclk.parent  = &s3c24xx_clkout1;



	s3c24xx_register_clocks(anubis_clocks, ARRAY_SIZE(anubis_clocks));

#endif



	s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc));

	s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs));

	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);

arch/arm/mach-s3c24xx/mach-bast.c

+0 −27
Original line number Diff line number Diff line
@@ -537,16 +537,6 @@ static struct platform_device *bast_devices[] __initdata = { 
	&bast_sio,

};



#ifdef CONFIG_SAMSUNG_CLK

static struct clk *bast_clocks[] __initdata = {

	&s3c24xx_dclk0,

	&s3c24xx_dclk1,

	&s3c24xx_clkout0,

	&s3c24xx_clkout1,

	&s3c24xx_uclk,

};

#endif



static struct s3c_cpufreq_board __initdata bast_cpufreq = {

	.refresh	= 7800, /* 7.8usec */

	.auto_io	= 1,
@@ -560,23 +550,6 @@ static struct s3c24xx_audio_simtec_pdata __initdata bast_audio = { 


static void __init bast_map_io(void)

{

#ifdef CONFIG_SAMSUNG_CLOCK

	/* initialise the clocks */



	s3c24xx_dclk0.parent = &clk_upll;

	s3c24xx_dclk0.rate   = 12*1000*1000;



	s3c24xx_dclk1.parent = &clk_upll;

	s3c24xx_dclk1.rate   = 24*1000*1000;



	s3c24xx_clkout0.parent  = &s3c24xx_dclk0;

	s3c24xx_clkout1.parent  = &s3c24xx_dclk1;



	s3c24xx_uclk.parent  = &s3c24xx_clkout1;



	s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks));

#endif



	s3c_hwmon_set_platdata(&bast_hwmon_info);



	s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));