Loading drivers/mmc/host/au1xmmc.c +17 −5 Original line number Diff line number Diff line Loading @@ -95,14 +95,13 @@ static inline void IRQ_OFF(struct au1xmmc_host *host, u32 mask) static inline void SEND_STOP(struct au1xmmc_host *host) { /* We know the value of CONFIG2, so avoid a read we don't need */ u32 mask = SD_CONFIG2_EN; u32 config2; WARN_ON(host->status != HOST_S_DATA); host->status = HOST_S_STOP; au_writel(mask | SD_CONFIG2_DF, HOST_CONFIG2(host)); config2 = au_readl(HOST_CONFIG2(host)); au_writel(config2 | SD_CONFIG2_DF, HOST_CONFIG2(host)); au_sync(); /* Send the stop commmand */ Loading Loading @@ -697,6 +696,7 @@ static void au1xmmc_reset_controller(struct au1xmmc_host *host) static void au1xmmc_set_ios(struct mmc_host* mmc, struct mmc_ios* ios) { struct au1xmmc_host *host = mmc_priv(mmc); u32 config2; if (ios->power_mode == MMC_POWER_OFF) au1xmmc_set_power(host, 0); Loading @@ -708,6 +708,18 @@ static void au1xmmc_set_ios(struct mmc_host* mmc, struct mmc_ios* ios) au1xmmc_set_clock(host, ios->clock); host->clock = ios->clock; } config2 = au_readl(HOST_CONFIG2(host)); switch (ios->bus_width) { case MMC_BUS_WIDTH_4: config2 |= SD_CONFIG2_WB; break; case MMC_BUS_WIDTH_1: config2 &= ~SD_CONFIG2_WB; break; } au_writel(config2, HOST_CONFIG2(host)); au_sync(); } #define STATUS_TIMEOUT (SD_STATUS_RAT | SD_STATUS_DT) Loading Loading @@ -952,7 +964,7 @@ static int __devinit au1xmmc_probe(struct platform_device *pdev) mmc->max_blk_count = 512; mmc->ocr_avail = AU1XMMC_OCR; mmc->caps = 0; mmc->caps = MMC_CAP_4_BIT_DATA; host->status = HOST_S_IDLE; Loading Loading
drivers/mmc/host/au1xmmc.c +17 −5 Original line number Diff line number Diff line Loading @@ -95,14 +95,13 @@ static inline void IRQ_OFF(struct au1xmmc_host *host, u32 mask) static inline void SEND_STOP(struct au1xmmc_host *host) { /* We know the value of CONFIG2, so avoid a read we don't need */ u32 mask = SD_CONFIG2_EN; u32 config2; WARN_ON(host->status != HOST_S_DATA); host->status = HOST_S_STOP; au_writel(mask | SD_CONFIG2_DF, HOST_CONFIG2(host)); config2 = au_readl(HOST_CONFIG2(host)); au_writel(config2 | SD_CONFIG2_DF, HOST_CONFIG2(host)); au_sync(); /* Send the stop commmand */ Loading Loading @@ -697,6 +696,7 @@ static void au1xmmc_reset_controller(struct au1xmmc_host *host) static void au1xmmc_set_ios(struct mmc_host* mmc, struct mmc_ios* ios) { struct au1xmmc_host *host = mmc_priv(mmc); u32 config2; if (ios->power_mode == MMC_POWER_OFF) au1xmmc_set_power(host, 0); Loading @@ -708,6 +708,18 @@ static void au1xmmc_set_ios(struct mmc_host* mmc, struct mmc_ios* ios) au1xmmc_set_clock(host, ios->clock); host->clock = ios->clock; } config2 = au_readl(HOST_CONFIG2(host)); switch (ios->bus_width) { case MMC_BUS_WIDTH_4: config2 |= SD_CONFIG2_WB; break; case MMC_BUS_WIDTH_1: config2 &= ~SD_CONFIG2_WB; break; } au_writel(config2, HOST_CONFIG2(host)); au_sync(); } #define STATUS_TIMEOUT (SD_STATUS_RAT | SD_STATUS_DT) Loading Loading @@ -952,7 +964,7 @@ static int __devinit au1xmmc_probe(struct platform_device *pdev) mmc->max_blk_count = 512; mmc->ocr_avail = AU1XMMC_OCR; mmc->caps = 0; mmc->caps = MMC_CAP_4_BIT_DATA; host->status = HOST_S_IDLE; Loading