Loading drivers/crypto/msm/ice.c +8 −2 Original line number Diff line number Diff line Loading @@ -1067,9 +1067,15 @@ static void qcom_ice_finish_init(void *data, async_cookie_t cookie) return; } /* if ICE_DISABLE_FUSE is blown, return immediately */ /* if ICE_DISABLE_FUSE is blown, return immediately * Currently, FORCE HW Keys are also disabled, since * there is no use case for their usage neither in FDE * nor in PFE */ reg = qcom_ice_readl(ice_dev, QCOM_ICE_REGS_FUSE_SETTING); reg &= ICE_FUSE_SETTING_MASK; reg &= (ICE_FUSE_SETTING_MASK | ICE_FORCE_HW_KEY0_SETTING_MASK | ICE_FORCE_HW_KEY1_SETTING_MASK); if (reg) { ice_dev->is_ice_disable_fuse_blown = true; Loading drivers/crypto/msm/iceregs.h +4 −2 Original line number Diff line number Diff line Loading @@ -23,7 +23,10 @@ #define ICE_CORE_MINOR_REV_MASK 0xFF0000 #define ICE_CORE_MINOR_REV 16 /* bit 23-16 */ #define ICE_FUSE_SETTING_MASK 0x1 #define ICE_FORCE_HW_KEY0_SETTING_MASK 0x2 #define ICE_FORCE_HW_KEY1_SETTING_MASK 0x4 /* QCOM ICE Registers from SWI */ #define QCOM_ICE_REGS_CONTROL 0x0000 Loading Loading @@ -90,7 +93,6 @@ #define QCOM_ICE_STREAM1_NOT_EXPECTED_NEW_TRNS (1L << 14) #define QCOM_ICE_STREAM2_NOT_EXPECTED_NEW_TRNS (1L << 15) #define QCOM_ICE_NON_SEC_IRQ_MASK \ (QCOM_ICE_STREAM1_PREMATURE_LBA_CHANGE |\ QCOM_ICE_STREAM2_PREMATURE_LBA_CHANGE |\ Loading Loading
drivers/crypto/msm/ice.c +8 −2 Original line number Diff line number Diff line Loading @@ -1067,9 +1067,15 @@ static void qcom_ice_finish_init(void *data, async_cookie_t cookie) return; } /* if ICE_DISABLE_FUSE is blown, return immediately */ /* if ICE_DISABLE_FUSE is blown, return immediately * Currently, FORCE HW Keys are also disabled, since * there is no use case for their usage neither in FDE * nor in PFE */ reg = qcom_ice_readl(ice_dev, QCOM_ICE_REGS_FUSE_SETTING); reg &= ICE_FUSE_SETTING_MASK; reg &= (ICE_FUSE_SETTING_MASK | ICE_FORCE_HW_KEY0_SETTING_MASK | ICE_FORCE_HW_KEY1_SETTING_MASK); if (reg) { ice_dev->is_ice_disable_fuse_blown = true; Loading
drivers/crypto/msm/iceregs.h +4 −2 Original line number Diff line number Diff line Loading @@ -23,7 +23,10 @@ #define ICE_CORE_MINOR_REV_MASK 0xFF0000 #define ICE_CORE_MINOR_REV 16 /* bit 23-16 */ #define ICE_FUSE_SETTING_MASK 0x1 #define ICE_FORCE_HW_KEY0_SETTING_MASK 0x2 #define ICE_FORCE_HW_KEY1_SETTING_MASK 0x4 /* QCOM ICE Registers from SWI */ #define QCOM_ICE_REGS_CONTROL 0x0000 Loading Loading @@ -90,7 +93,6 @@ #define QCOM_ICE_STREAM1_NOT_EXPECTED_NEW_TRNS (1L << 14) #define QCOM_ICE_STREAM2_NOT_EXPECTED_NEW_TRNS (1L << 15) #define QCOM_ICE_NON_SEC_IRQ_MASK \ (QCOM_ICE_STREAM1_PREMATURE_LBA_CHANGE |\ QCOM_ICE_STREAM2_PREMATURE_LBA_CHANGE |\ Loading