Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 278c800e authored by Tomasz Figa's avatar Tomasz Figa Committed by Olof Johansson
Browse files

ARM: SAMSUNG: Do not register legacy timer interrupts on Exynos 



This patch removes legacy PWM timer interrupt initialization from
exynos{4,5}_init_irq() functions, since it conflicts with internal
interrupt handling of the new PWM clocksource driver.

Signed-off-by: default avatarTomasz Figa <t.figa@samsung.com>
Signed-off-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
Acked-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent 81d4f7bf

arch/arm/mach-exynos/common.c

+0 −15
Original line number Diff line number Diff line
@@ -456,13 +456,6 @@ void __init exynos4_init_irq(void) 


	if (!of_have_populated_dt())

		combiner_init(S5P_VA_COMBINER_BASE, NULL);



	/*

	 * The parameters of s5p_init_irq() are for VIC init.

	 * Theses parameters should be NULL and 0 because EXYNOS4

	 * uses GIC instead of VIC.

	 */

	s5p_init_irq(NULL, 0);

}



void __init exynos5_init_irq(void)
@@ -470,14 +463,6 @@ void __init exynos5_init_irq(void) 
#ifdef CONFIG_OF

	irqchip_init();

#endif

	/*

	 * The parameters of s5p_init_irq() are for VIC init.

	 * Theses parameters should be NULL and 0 because EXYNOS4

	 * uses GIC instead of VIC.

	 */

	if (!of_machine_is_compatible("samsung,exynos5440"))

		s5p_init_irq(NULL, 0);



	gic_arch_extn.irq_set_wake = s3c_irq_wake;

}

arch/arm/plat-samsung/Kconfig

+2 −2
Original line number Diff line number Diff line
@@ -101,9 +101,9 @@ config SAMSUNG_IRQ_VIC_TIMER 
         Internal configuration to build the VIC timer interrupt code.



config S5P_IRQ

	def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)

	def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)

	help

	  Support common interrup part for ARCH_S5P and ARCH_EXYNOS SoCs

	  Support common interrupt part for ARCH_S5P SoCs



config S5P_EXT_INT

	bool