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Commit 265f64ad authored by Sathish Ambley's avatar Sathish Ambley
Browse files

ARM: dts: msm: Add adsp shared context bank to msmtitanium 



Add adsp shared dma pool for remote heap and context bank to
msmtitanium iommu context bank list.

Change-Id: I3e8a530242a61211d73a270a3a695471cf67a1ca
Acked-by: default avatarBharath Kumar <bkumar@qti.qualcomm.com>
Signed-off-by: default avatarSathish Ambley <sathishambley@codeaurora.org>
parent bb0361a5

arch/arm/boot/dts/qcom/msmtitanium-iommu-domains.dtsi

0 → 100644
+25 −0
Original line number Diff line number Diff line 
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&soc {

	qcom,iommu-domains {

		compatible = "qcom,iommu-domains";

		/*

		 * non-secure addr pool from 2048MB to 4096MB

		*/

		adsp_shared_domain: qcom,iommu-domain6 {

			label = "adsp_shared";

			qcom,iommu-contexts = <&adsp_shared>;

			qcom,virtual-addr-pool = <0x80000000 0x7FFFFFFF>;

		};

	};

};

arch/arm/boot/dts/qcom/msmtitanium.dtsi

+21 −0
Original line number Diff line number Diff line
@@ -65,6 +65,12 @@ 
			alignment = <0 0x400000>;

			size = <0 0x1000000>;

		};



		adsp_mem: adsp_region@0 {

			compatible = "shared-dma-pool";

			reusable;

			size = <0 0x400000>;

		};

	};



	aliases {
@@ -93,6 +99,7 @@ 
#include "msmtitanium-smp2p.dtsi"

#include "msm-arm-smmu-titanium.dtsi"

#include "msmtitanium-coresight.dtsi"

#include "msmtitanium-iommu-domains.dtsi"



&soc {

	#address-cells = <1>;
@@ -462,6 +469,20 @@ 
		qcom,fragmented-data;

	};



	qcom,adsprpc-mem {

		compatible = "qcom,msm-adsprpc-mem-region";

		memory-region = <&adsp_mem>;

	};



	qcom,adsprpc_domains {

		compatible = "qcom,msm-fastrpc-legacy-compute-cb";

		qcom,msm_fastrpc_compute_cb {

			qcom,adsp-shared-domain-phandle = <&adsp_shared_domain>;

			qcom,adsp-shared-sids =

					<0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf>;

		};

	};



	sdhc_1: sdhci@7824900 {

		compatible = "qcom,sdhci-msm";

		reg = <0x7824900 0x500>, <0x7824000 0x800>;