Loading drivers/dma/shdma.c +6 −0 Original line number Diff line number Diff line Loading @@ -194,6 +194,9 @@ static void dmae_start(struct sh_dmae_chan *sh_chan) struct sh_dmae_device *shdev = to_sh_dev(sh_chan); u32 chcr = chcr_read(sh_chan); if (shdev->pdata->needs_tend_set) sh_dmae_writel(sh_chan, 0xFFFFFFFF, TEND); chcr |= CHCR_DE | shdev->chcr_ie_bit; chcr_write(sh_chan, chcr & ~CHCR_TE); } Loading Loading @@ -242,6 +245,9 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val) if (dmae_is_busy(sh_chan)) return -EBUSY; if (pdata->no_dmars) return 0; /* in the case of a missing DMARS resource use first memory window */ if (!addr) addr = (u16 __iomem *)shdev->chan_reg; Loading include/linux/sh_dma.h +4 −0 Original line number Diff line number Diff line Loading @@ -66,6 +66,8 @@ struct sh_dmae_pdata { u32 chcr_ie_bit; unsigned int dmaor_is_32bit:1; unsigned int needs_tend_set:1; unsigned int no_dmars:1; }; /* DMA register */ Loading @@ -75,6 +77,8 @@ struct sh_dmae_pdata { #define CHCR 0x0C #define DMAOR 0x40 #define TEND 0x18 /* USB-DMAC */ /* DMAOR definitions */ #define DMAOR_AE 0x00000004 #define DMAOR_NMIF 0x00000002 Loading Loading
drivers/dma/shdma.c +6 −0 Original line number Diff line number Diff line Loading @@ -194,6 +194,9 @@ static void dmae_start(struct sh_dmae_chan *sh_chan) struct sh_dmae_device *shdev = to_sh_dev(sh_chan); u32 chcr = chcr_read(sh_chan); if (shdev->pdata->needs_tend_set) sh_dmae_writel(sh_chan, 0xFFFFFFFF, TEND); chcr |= CHCR_DE | shdev->chcr_ie_bit; chcr_write(sh_chan, chcr & ~CHCR_TE); } Loading Loading @@ -242,6 +245,9 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val) if (dmae_is_busy(sh_chan)) return -EBUSY; if (pdata->no_dmars) return 0; /* in the case of a missing DMARS resource use first memory window */ if (!addr) addr = (u16 __iomem *)shdev->chan_reg; Loading
include/linux/sh_dma.h +4 −0 Original line number Diff line number Diff line Loading @@ -66,6 +66,8 @@ struct sh_dmae_pdata { u32 chcr_ie_bit; unsigned int dmaor_is_32bit:1; unsigned int needs_tend_set:1; unsigned int no_dmars:1; }; /* DMA register */ Loading @@ -75,6 +77,8 @@ struct sh_dmae_pdata { #define CHCR 0x0C #define DMAOR 0x40 #define TEND 0x18 /* USB-DMAC */ /* DMAOR definitions */ #define DMAOR_AE 0x00000004 #define DMAOR_NMIF 0x00000002 Loading