Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 25a99b0d authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add fmax DDR voting and fmax GPU clock support for MSM8917"

parents 929900c3 f269a1d1
Loading
Loading
Loading
Loading
+12 −8
Original line number Diff line number Diff line
@@ -34,15 +34,18 @@
			< 5859 >, /* 4. DDR:384.00 MHz BIMC: 768.00 MHz */
			< 8496 >, /* 5. DDR:556.80 MHz BIMC: 1113.60 MHz */
			< 9082 >, /* 6. DDR:595.20 MHz BIMC: 1190.40 MHz */
			< 10253>; /* 7. DDR:672.00 MHz BIMC: 1344.00 MHz */
			< 10253>, /* 7. DDR:672.00 MHz BIMC: 1344.00 MHz */
			< 11279>; /* 8. DDR:739.20 MHz BIMC: 1478.40 MHz */
	};

	msm_gpu: qcom,kgsl-3d0@1c00000 {
		label = "kgsl-3d0";
		compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d";
		reg = <0x1c00000 0x10000
		       0x1c10000 0x10000>;
		reg-names = "kgsl_3d0_reg_memory" , "kgsl_3d0_shader_memory";
		       0x1c10000 0x10000
		       0x00a0000 0x06fff>;
		reg-names = "kgsl_3d0_reg_memory" , "kgsl_3d0_shader_memory",
				"qfprom_memory";
		interrupts = <0 33 0>;
		interrupt-names = "kgsl_3d0_irq";
		qcom,id = <0>;
@@ -74,17 +77,18 @@
		qcom,bus-control;
		qcom,bus-width = <16>;
		qcom,msm-bus,name = "grp3d";
		qcom,msm-bus,num-cases = <8>;
		qcom,msm-bus,num-cases = <9>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
				<26 512 0 0>,	    /*    off        */
				<26 512 0  1612800>, /* 1. 100.80 MHz */
				<26 512 0  3379200>, /* 2. 211.20 MHz */
				<26 512 0  4454400>, /* 3. 278.40 MHz */
				<26 512 0  4761600>, /* 3. 297.60 MHz */
				<26 512 0  6144000>, /* 4. 384.00 MHz */
				<26 512 0  8601600>, /* 5. 537.60 MHz */
				<26 512 0  8908800>, /* 6. 556.80 MHz */
				<26 512 0 10598400>; /* 7. 662.40 MHz */
				<26 512 0  8908800>, /* 5. 556.80 MHz */
				<26 512 0  9523200>, /* 6. 595.20 MHz */
				<26 512 0 10752000>, /* 7. 672.00 MHz */
				<26 512 0 11827200>; /* 8. 739.20 MHz */

		/* GDSC regulator names */
		regulator-names = "vdd";
+135 −0
Original line number Diff line number Diff line
@@ -1743,3 +1743,138 @@
	qcom,clk-dis-wait-val = <0x5>;
	status = "okay";
};

/* GPU overrides */
&msm_gpu {

	qcom,gpu-speed-bin = <0x6018 0x80000000 31>;

	qcom,gpu-pwrlevel-bins {
		#address-cells = <1>;
		#size-cells = <0>;

		compatible="qcom,gpu-pwrlevel-bins";

		qcom,gpu-pwrlevels-0 {
			#address-cells = <1>;
			#size-cells = <0>;

			qcom,speed-bin = <0>;

			/* TURBO */
			qcom,gpu-pwrlevel@0 {
				reg = <0>;
				qcom,gpu-freq = <598000000>;
				qcom,bus-freq = <7>;
				qcom,bus-min = <7>;
				qcom,bus-max = <7>;
			};

			/* NOM+ */
			qcom,gpu-pwrlevel@1 {
				reg = <1>;
				qcom,gpu-freq = <523200000>;
				qcom,bus-freq = <6>;
				qcom,bus-min = <5>;
				qcom,bus-max = <7>;
			};

			/* NOM */
			qcom,gpu-pwrlevel@2 {
				reg = <2>;
				qcom,gpu-freq = <484800000>;
				qcom,bus-freq = <5>;
				qcom,bus-min = <4>;
				qcom,bus-max = <6>;
			};

			/* SVS+ */
			qcom,gpu-pwrlevel@3 {
				reg = <3>;
				qcom,gpu-freq = <400000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <3>;
				qcom,bus-max = <5>;
			};

			/* SVS */
			qcom,gpu-pwrlevel@4 {
				reg = <4>;
				qcom,gpu-freq = <270000000>;
				qcom,bus-freq = <3>;
				qcom,bus-min = <1>;
				qcom,bus-max = <3>;
			};

			/* XO */
			qcom,gpu-pwrlevel@5 {
				reg = <5>;
				qcom,gpu-freq = <19200000>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;
				qcom,bus-max = <0>;
			};
		};

		qcom,gpu-pwrlevels-1 {
			#address-cells = <1>;
			#size-cells = <0>;

			qcom,speed-bin = <1>;

			/* TURBO */
			qcom,gpu-pwrlevel@0 {
				reg = <0>;
				qcom,gpu-freq = <650000000>;
				qcom,bus-freq = <8>;
				qcom,bus-min = <8>;
				qcom,bus-max = <8>;
			};

			/* NOM+ */
			qcom,gpu-pwrlevel@1 {
				reg = <1>;
				qcom,gpu-freq = <523200000>;
				qcom,bus-freq = <6>;
				qcom,bus-min = <5>;
				qcom,bus-max = <7>;
			};

			/* NOM */
			qcom,gpu-pwrlevel@2 {
				reg = <2>;
				qcom,gpu-freq = <484800000>;
				qcom,bus-freq = <5>;
				qcom,bus-min = <4>;
				qcom,bus-max = <6>;
			};

			/* SVS+ */
			qcom,gpu-pwrlevel@3 {
				reg = <3>;
				qcom,gpu-freq = <400000000>;
				qcom,bus-freq = <4>;
				qcom,bus-min = <3>;
				qcom,bus-max = <5>;
			};

			/* SVS */
			qcom,gpu-pwrlevel@4 {
				reg = <4>;
				qcom,gpu-freq = <270000000>;
				qcom,bus-freq = <3>;
				qcom,bus-min = <1>;
				qcom,bus-max = <3>;
			};

			/* XO */
			qcom,gpu-pwrlevel@5 {
				reg = <5>;
				qcom,gpu-freq = <19200000>;
				qcom,bus-freq = <0>;
				qcom,bus-min = <0>;
				qcom,bus-max = <0>;
			};
		};
	};
};