Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 253b999f authored by Jaroslav Kysela's avatar Jaroslav Kysela
Browse files

[ALSA] intel8x0 - wait for ICH_RESETREGS 



Modules: Intel8x0 driver

It seems that hardware requires some time to reset bus master registers.
We need to wait until ICH_RESETREGS bit is not released.

The suggestion and symptom was described by Mike Gorchak <lestat@i.com.ua>.

Signed-off-by: default avatarJaroslav Kysela <perex@suse.cz>
parent f7004f39

sound/pci/intel8x0.c

+10 −1
Original line number Diff line number Diff line
@@ -2351,7 +2351,7 @@ static int snd_intel8x0_ali_chip_init(struct intel8x0 *chip, int probing) 


static int snd_intel8x0_chip_init(struct intel8x0 *chip, int probing)

{

	unsigned int i;

	unsigned int i, timeout;

	int err;

	

	if (chip->device_type != DEVICE_ALI) {
@@ -2369,6 +2369,15 @@ static int snd_intel8x0_chip_init(struct intel8x0 *chip, int probing) 
	/* reset channels */

	for (i = 0; i < chip->bdbars_count; i++)

		iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, ICH_RESETREGS);

	for (i = 0; i < chip->bdbars_count; i++) {

	        timeout = 100000;

	        while (--timeout != 0) {

        		if ((igetbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset) & ICH_RESETREGS) == 0)

        		        break;

                }

                if (timeout == 0)

                        printk(KERN_ERR "intel8x0: reset of registers failed?\n");

        }

	/* initialize Buffer Descriptor Lists */

	for (i = 0; i < chip->bdbars_count; i++)

		iputdword(chip, ICH_REG_OFF_BDBAR + chip->ichd[i].reg_offset,