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Commit 24f43b33 authored by Masato Noguchi's avatar Masato Noguchi Committed by Paul Mackerras
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[POWERPC] spufs: wrap mfc sdr access 



SPRN_SDR1 and the SPE's MFC SDR are hypervisor resources and
are not accessible from a logical partition.  This change adds an
access wrapper.

When running on bare H/W, the spufs needs to only set the SPE's MFC SDR
to the value of the PPE's SPRN_SDR1 once at SPE initialization, so this
change renames mfc_sdr_set() to mfc_sdr_setup() and moves the
access of SPRN_SDR1 into the mmio wrapper.  It also removes the now
unneeded member mfc_sdr_RW from struct spu_priv1_collapsed.

Signed-off-by: default avatarMasato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: default avatarGeoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: default avatarArnd Bergmann <arnd.bergmann@de.ibm.com>

--
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 5414c6be

arch/powerpc/platforms/cell/spu_base.c

+1 −1
Original line number Diff line number Diff line
@@ -805,7 +805,7 @@ static int __init create_spu(struct device_node *spe) 
	if (ret)

		goto out_unmap;

	spin_lock_init(&spu->register_lock);

	spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1));

	spu_mfc_sdr_setup(spu);

	spu_mfc_sr1_set(spu, 0x33);

	mutex_lock(&spu_mutex);

arch/powerpc/platforms/cell/spu_priv1_mmio.c

+3 −3
Original line number Diff line number Diff line
@@ -84,9 +84,9 @@ static void mfc_dsisr_set(struct spu *spu, u64 dsisr) 
	out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);

}



static void mfc_sdr_set(struct spu *spu, u64 sdr)

static void mfc_sdr_setup(struct spu *spu)

{

	out_be64(&spu->priv1->mfc_sdr_RW, sdr);

	out_be64(&spu->priv1->mfc_sdr_RW, mfspr(SPRN_SDR1));

}



static void mfc_sr1_set(struct spu *spu, u64 sr1)
@@ -146,7 +146,7 @@ const struct spu_priv1_ops spu_priv1_mmio_ops = 
	.mfc_dar_get = mfc_dar_get,

	.mfc_dsisr_get = mfc_dsisr_get,

	.mfc_dsisr_set = mfc_dsisr_set,

	.mfc_sdr_set = mfc_sdr_set,

	.mfc_sdr_setup = mfc_sdr_setup,

	.mfc_sr1_set = mfc_sr1_set,

	.mfc_sr1_get = mfc_sr1_get,

	.mfc_tclass_id_set = mfc_tclass_id_set,

arch/powerpc/platforms/cell/spufs/switch.c

+0 −3
Original line number Diff line number Diff line
@@ -2165,9 +2165,6 @@ static void init_priv1(struct spu_state *csa) 
	    MFC_STATE1_PROBLEM_STATE_MASK |

	    MFC_STATE1_RELOCATE_MASK | MFC_STATE1_BUS_TLBIE_MASK;



	/* Set storage description.  */

	csa->priv1.mfc_sdr_RW = mfspr(SPRN_SDR1);



	/* Enable OS-specific set of interrupts. */

	csa->priv1.int_mask_class0_RW = CLASS0_ENABLE_DMA_ALIGNMENT_INTR |

	    CLASS0_ENABLE_INVALID_DMA_COMMAND_INTR |

include/asm-powerpc/spu_csa.h

+0 −1
Original line number Diff line number Diff line
@@ -151,7 +151,6 @@ struct spu_priv1_collapsed { 
	u64 mfc_fir_chkstp_enable_RW;

	u64 smf_sbi_signal_sel;

	u64 smf_ato_signal_sel;

	u64 mfc_sdr_RW;

	u64 tlb_index_hint_RO;

	u64 tlb_index_W;

	u64 tlb_vpn_RW;

include/asm-powerpc/spu_priv1.h

+3 −3
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ struct spu_priv1_ops 
	u64 (*mfc_dar_get) (struct spu *spu);

	u64 (*mfc_dsisr_get) (struct spu *spu);

	void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr);

	void (*mfc_sdr_set) (struct spu *spu, u64 sdr);

	void (*mfc_sdr_setup) (struct spu *spu);

	void (*mfc_sr1_set) (struct spu *spu, u64 sr1);

	u64 (*mfc_sr1_get) (struct spu *spu);

	void (*mfc_tclass_id_set) (struct spu *spu, u64 tclass_id);
@@ -112,9 +112,9 @@ spu_mfc_dsisr_set (struct spu *spu, u64 dsisr) 
}



static inline void

spu_mfc_sdr_set (struct spu *spu, u64 sdr)

spu_mfc_sdr_setup (struct spu *spu)

{

	spu_priv1_ops->mfc_sdr_set(spu, sdr);

	spu_priv1_ops->mfc_sdr_setup(spu);

}



static inline void