Loading drivers/net/ethernet/qualcomm/emac/emac_hw.h +1 −3 Original line number Diff line number Diff line Loading @@ -108,9 +108,7 @@ bool emac_hw_read_tx_tstamp(struct emac_hw *hw, struct emac_hwtxtstamp *ts); #define DMAR_DLY_CNT_DEF 15 #define DMAW_DLY_CNT_DEF 4 #define MDIO_CLK_25_8 3 #define MDIO_CLK_25_10 4 #define MDIO_CLK_25_28 7 #define MDIO_CLK_25_4 0 #define RXQ0_RSS_HSTYP_IPV6_TCP_EN 0x20 #define RXQ0_RSS_HSTYP_IPV6_EN 0x10 Loading drivers/net/ethernet/qualcomm/emac/emac_main.c +10 −4 Original line number Diff line number Diff line Loading @@ -1991,7 +1991,9 @@ void emac_mac_down(struct emac_adapter *adpt, u32 ctrl) if (adpt->irq[i].irq) free_irq(adpt->irq[i].irq, &adpt->irq[i]); if ((ATH8030_PHY_ID == adpt->phydev->phy_id) && if (((ATH8030_PHY_ID == adpt->phydev->phy_id) || (ATH8031_PHY_ID == adpt->phydev->phy_id) || (ATH8035_PHY_ID == adpt->phydev->phy_id)) && (adpt->phy.is_ext_phy_connect)) { phy_disconnect(adpt->phydev); adpt->phy.is_ext_phy_connect = 0; Loading Loading @@ -3212,10 +3214,14 @@ err_undo_napi: err_init_mdio_gpio: adpt->gpio_off(adpt, true, true); err_clk_init: if (ATH8030_PHY_ID == adpt->phydev->phy_id) if ((ATH8030_PHY_ID == adpt->phydev->phy_id) || (ATH8031_PHY_ID == adpt->phydev->phy_id) || (ATH8035_PHY_ID == adpt->phydev->phy_id)) emac_disable_clks(adpt); err_ldo_init: if (ATH8030_PHY_ID == adpt->phydev->phy_id) if ((ATH8030_PHY_ID == adpt->phydev->phy_id) || (ATH8031_PHY_ID == adpt->phydev->phy_id) || (ATH8035_PHY_ID == adpt->phydev->phy_id)) emac_disable_regulator(adpt, EMAC_VREG1, EMAC_VREG5); err_get_resource: free_netdev(netdev); Loading drivers/net/ethernet/qualcomm/emac/emac_phy.c +2 −2 Original line number Diff line number Diff line Loading @@ -100,7 +100,7 @@ static int emac_mdio_read(struct mii_bus *bus, int addr, int regnum) reg = reg & ~(MDIO_REG_ADDR_BMSK | MDIO_CLK_SEL_BMSK | MDIO_MODE | MDIO_PR); reg = SUP_PREAMBLE | ((MDIO_CLK_25_10 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) | ((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) | ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) | MDIO_START | MDIO_RD_NWR; Loading Loading @@ -156,7 +156,7 @@ static int emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val) reg = reg & ~(MDIO_REG_ADDR_BMSK | MDIO_CLK_SEL_BMSK | MDIO_DATA_BMSK | MDIO_MODE | MDIO_PR); reg = SUP_PREAMBLE | ((MDIO_CLK_25_10 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) | ((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) | ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) | ((val << MDIO_DATA_SHFT) & MDIO_DATA_BMSK) | MDIO_START; Loading include/linux/qca8337.h +2 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,8 @@ #define QCA8337_PHY_ID 0x004dd036 #define ATH8030_PHY_ID 0x004dd076 #define ATH8031_PHY_ID 0x004dd074 #define ATH8035_PHY_ID 0x004dd072 #define QCA8337_ID_QCA8337 0x13 #define QCA8337_NUM_PORTS 7 /* Make sure that port0 is the cpu port */ Loading Loading
drivers/net/ethernet/qualcomm/emac/emac_hw.h +1 −3 Original line number Diff line number Diff line Loading @@ -108,9 +108,7 @@ bool emac_hw_read_tx_tstamp(struct emac_hw *hw, struct emac_hwtxtstamp *ts); #define DMAR_DLY_CNT_DEF 15 #define DMAW_DLY_CNT_DEF 4 #define MDIO_CLK_25_8 3 #define MDIO_CLK_25_10 4 #define MDIO_CLK_25_28 7 #define MDIO_CLK_25_4 0 #define RXQ0_RSS_HSTYP_IPV6_TCP_EN 0x20 #define RXQ0_RSS_HSTYP_IPV6_EN 0x10 Loading
drivers/net/ethernet/qualcomm/emac/emac_main.c +10 −4 Original line number Diff line number Diff line Loading @@ -1991,7 +1991,9 @@ void emac_mac_down(struct emac_adapter *adpt, u32 ctrl) if (adpt->irq[i].irq) free_irq(adpt->irq[i].irq, &adpt->irq[i]); if ((ATH8030_PHY_ID == adpt->phydev->phy_id) && if (((ATH8030_PHY_ID == adpt->phydev->phy_id) || (ATH8031_PHY_ID == adpt->phydev->phy_id) || (ATH8035_PHY_ID == adpt->phydev->phy_id)) && (adpt->phy.is_ext_phy_connect)) { phy_disconnect(adpt->phydev); adpt->phy.is_ext_phy_connect = 0; Loading Loading @@ -3212,10 +3214,14 @@ err_undo_napi: err_init_mdio_gpio: adpt->gpio_off(adpt, true, true); err_clk_init: if (ATH8030_PHY_ID == adpt->phydev->phy_id) if ((ATH8030_PHY_ID == adpt->phydev->phy_id) || (ATH8031_PHY_ID == adpt->phydev->phy_id) || (ATH8035_PHY_ID == adpt->phydev->phy_id)) emac_disable_clks(adpt); err_ldo_init: if (ATH8030_PHY_ID == adpt->phydev->phy_id) if ((ATH8030_PHY_ID == adpt->phydev->phy_id) || (ATH8031_PHY_ID == adpt->phydev->phy_id) || (ATH8035_PHY_ID == adpt->phydev->phy_id)) emac_disable_regulator(adpt, EMAC_VREG1, EMAC_VREG5); err_get_resource: free_netdev(netdev); Loading
drivers/net/ethernet/qualcomm/emac/emac_phy.c +2 −2 Original line number Diff line number Diff line Loading @@ -100,7 +100,7 @@ static int emac_mdio_read(struct mii_bus *bus, int addr, int regnum) reg = reg & ~(MDIO_REG_ADDR_BMSK | MDIO_CLK_SEL_BMSK | MDIO_MODE | MDIO_PR); reg = SUP_PREAMBLE | ((MDIO_CLK_25_10 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) | ((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) | ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) | MDIO_START | MDIO_RD_NWR; Loading Loading @@ -156,7 +156,7 @@ static int emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val) reg = reg & ~(MDIO_REG_ADDR_BMSK | MDIO_CLK_SEL_BMSK | MDIO_DATA_BMSK | MDIO_MODE | MDIO_PR); reg = SUP_PREAMBLE | ((MDIO_CLK_25_10 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) | ((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) | ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) | ((val << MDIO_DATA_SHFT) & MDIO_DATA_BMSK) | MDIO_START; Loading
include/linux/qca8337.h +2 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,8 @@ #define QCA8337_PHY_ID 0x004dd036 #define ATH8030_PHY_ID 0x004dd076 #define ATH8031_PHY_ID 0x004dd074 #define ATH8035_PHY_ID 0x004dd072 #define QCA8337_ID_QCA8337 0x13 #define QCA8337_NUM_PORTS 7 /* Make sure that port0 is the cpu port */ Loading