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Commit 2497fc12 authored by Mugunthan V N's avatar Mugunthan V N Committed by Sasha Levin
Browse files

ARM: dts: dra7: Add CPSW and MDIO module nodes for dra7 



[ Upstream commit ef9c5b690079233a042887cd07279aac5ec692a8 ]

Add CPSW and MDIO related device tree data for DRA7XX and made as status
disabled. Phy-id, pinmux for active and sleep state needs to be added in
board dts files and enable the CPSW device.

Signed-off-by: default avatarMugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarSasha Levin <sasha.levin@oracle.com>
parent a302f98e

arch/arm/boot/dts/dra7.dtsi

+61 −0
Original line number Diff line number Diff line
@@ -34,6 +34,8 @@ 
		serial3 = &uart4;

		serial4 = &uart5;

		serial5 = &uart6;

		ethernet0 = &cpsw_emac0;

		ethernet1 = &cpsw_emac1;

	};



	timer {
@@ -1265,6 +1267,65 @@ 
			ti,irqs-skip = <10 133 139 140>;

			ti,irqs-safe-map = <0>;

		};



		mac: ethernet@4a100000 {

			compatible = "ti,cpsw";

			ti,hwmods = "gmac";

			clocks = <&dpll_gmac_ck>, <&gmac_gmii_ref_clk_div>;

			clock-names = "fck", "cpts";

			cpdma_channels = <8>;

			ale_entries = <1024>;

			bd_ram_size = <0x2000>;

			no_bd_ram = <0>;

			rx_descs = <64>;

			mac_control = <0x20>;

			slaves = <2>;

			active_slave = <0>;

			cpts_clock_mult = <0x80000000>;

			cpts_clock_shift = <29>;

			reg = <0x48484000 0x1000

			       0x48485200 0x2E00>;

			#address-cells = <1>;

			#size-cells = <1>;

			/*

			 * rx_thresh_pend

			 * rx_pend

			 * tx_pend

			 * misc_pend

			 */

			interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;

			ranges;

			status = "disabled";



			davinci_mdio: mdio@48485000 {

				compatible = "ti,davinci_mdio";

				#address-cells = <1>;

				#size-cells = <0>;

				ti,hwmods = "davinci_mdio";

				bus_freq = <1000000>;

				reg = <0x48485000 0x100>;

			};



			cpsw_emac0: slave@48480200 {

				/* Filled in by U-Boot */

				mac-address = [ 00 00 00 00 00 00 ];

			};



			cpsw_emac1: slave@48480300 {

				/* Filled in by U-Boot */

				mac-address = [ 00 00 00 00 00 00 ];

			};



			phy_sel: cpsw-phy-sel@4a002554 {

				compatible = "ti,dra7xx-cpsw-phy-sel";

				reg= <0x4a002554 0x4>;

				reg-names = "gmii-sel";

			};

		};



	};

};