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Commit 247fa192 authored by Mark Brown's avatar Mark Brown Committed by Samuel Ortiz
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mfd: arizona: Fully support the use of MCLK1 as the 32kHz clock source 



MCLK1 is not in the AoD power domain so if it is used as the 32kHz clock
source we need to hold a runtime PM reference to keep the device from going
into low power mode.

Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: default avatarSamuel Ortiz <sameo@linux.intel.com>
parent 7adafc5d

drivers/mfd/arizona-core.c

+19 −2
Original line number Diff line number Diff line
@@ -39,11 +39,21 @@ int arizona_clk32k_enable(struct arizona *arizona) 


	arizona->clk32k_ref++;



	if (arizona->clk32k_ref == 1)

	if (arizona->clk32k_ref == 1) {

		switch (arizona->pdata.clk32k_src) {

		case ARIZONA_32KZ_MCLK1:

			ret = pm_runtime_get_sync(arizona->dev);

			if (ret != 0)

				goto out;

			break;

		}



		ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,

					 ARIZONA_CLK_32K_ENA,

					 ARIZONA_CLK_32K_ENA);

	}



out:

	if (ret != 0)

		arizona->clk32k_ref--;
@@ -63,10 +73,17 @@ int arizona_clk32k_disable(struct arizona *arizona) 


	arizona->clk32k_ref--;



	if (arizona->clk32k_ref == 0)

	if (arizona->clk32k_ref == 0) {

		regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,

				   ARIZONA_CLK_32K_ENA, 0);



		switch (arizona->pdata.clk32k_src) {

		case ARIZONA_32KZ_MCLK1:

			pm_runtime_put_sync(arizona->dev);

			break;

		}

	}



	mutex_unlock(&arizona->clk_lock);



	return ret;