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Commit 243fedd5 authored by Srikanth Thokala's avatar Srikanth Thokala Committed by David S. Miller
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net: emaclite: Remove unnecessary code that enables/disables interrupts on PONG buffers 



There are no specific interrupts for the PONG buffer on both
transmit and receive side, same interrupt is valid for both
buffers. So, this patch removes this code.

Signed-off-by: default avatarSrikanth Thokala <sthokal@xilinx.com>
Reviewed-by: default avatarMichal Simek <monstr@monstr.eu>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent a3300ef4

drivers/net/ethernet/xilinx/xilinx_emaclite.c

+0 −38
Original line number Diff line number Diff line
@@ -163,26 +163,9 @@ static void xemaclite_enable_interrupts(struct net_local *drvdata) 
	__raw_writel(reg_data | XEL_TSR_XMIT_IE_MASK,

		     drvdata->base_addr + XEL_TSR_OFFSET);



	/* Enable the Tx interrupts for the second Buffer if

	 * configured in HW */

	if (drvdata->tx_ping_pong != 0) {

		reg_data = __raw_readl(drvdata->base_addr +

				   XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);

		__raw_writel(reg_data | XEL_TSR_XMIT_IE_MASK,

			     drvdata->base_addr + XEL_BUFFER_OFFSET +

			     XEL_TSR_OFFSET);

	}



	/* Enable the Rx interrupts for the first buffer */

	__raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET);



	/* Enable the Rx interrupts for the second Buffer if

	 * configured in HW */

	if (drvdata->rx_ping_pong != 0) {

		__raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr +

			     XEL_BUFFER_OFFSET + XEL_RSR_OFFSET);

	}



	/* Enable the Global Interrupt Enable */

	__raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);

}
@@ -206,31 +189,10 @@ static void xemaclite_disable_interrupts(struct net_local *drvdata) 
	__raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),

		     drvdata->base_addr + XEL_TSR_OFFSET);



	/* Disable the Tx interrupts for the second Buffer

	 * if configured in HW */

	if (drvdata->tx_ping_pong != 0) {

		reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET +

				   XEL_TSR_OFFSET);

		__raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),

			     drvdata->base_addr + XEL_BUFFER_OFFSET +

			     XEL_TSR_OFFSET);

	}



	/* Disable the Rx interrupts for the first buffer */

	reg_data = __raw_readl(drvdata->base_addr + XEL_RSR_OFFSET);

	__raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),

		     drvdata->base_addr + XEL_RSR_OFFSET);



	/* Disable the Rx interrupts for the second buffer

	 * if configured in HW */

	if (drvdata->rx_ping_pong != 0) {



		reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET +

				   XEL_RSR_OFFSET);

		__raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),

			     drvdata->base_addr + XEL_BUFFER_OFFSET +

			     XEL_RSR_OFFSET);

	}

}



/**