Loading arch/mips/Kconfig +6 −5 Original line number Diff line number Diff line Loading @@ -106,6 +106,7 @@ config ATH79 config BCM47XX bool "Broadcom BCM47XX based boards" select ARCH_WANT_OPTIONAL_GPIOLIB select CEVT_R4K select CSRC_R4K select DMA_NONCOHERENT Loading @@ -114,7 +115,6 @@ config BCM47XX select IRQ_CPU select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN select GENERIC_GPIO select SYS_HAS_EARLY_PRINTK help Support for BCM47XX based boards Loading Loading @@ -798,7 +798,7 @@ config NLM_XLR_BOARD select CSRC_R4K select IRQ_CPU select ARCH_SUPPORTS_MSI select ZONE_DMA if 64BIT select ZONE_DMA32 if 64BIT select SYNC_R4K select SYS_HAS_EARLY_PRINTK select USB_ARCH_HAS_OHCI if USB_SUPPORT Loading Loading @@ -826,7 +826,7 @@ config NLM_XLP_BOARD select CEVT_R4K select CSRC_R4K select IRQ_CPU select ZONE_DMA if 64BIT select ZONE_DMA32 if 64BIT select SYNC_R4K select SYS_HAS_EARLY_PRINTK select USE_OF Loading Loading @@ -1507,6 +1507,7 @@ config CPU_XLP select WEAK_ORDERING select WEAK_REORDERING_BEYOND_LLSC select CPU_HAS_PREFETCH select CPU_MIPSR2 help Netlogic Microsystems XLP processors. endchoice Loading Loading @@ -1718,7 +1719,7 @@ config CPU_SUPPORTS_UNCACHED_ACCELERATED bool config MIPS_PGD_C0_CONTEXT bool default y if 64BIT && CPU_MIPSR2 default y if 64BIT && CPU_MIPSR2 && !CPU_XLP # # Set to y for ptrace access to watch registers. Loading Loading @@ -2149,7 +2150,7 @@ config NODES_SHIFT config HW_PERF_EVENTS bool "Enable hardware performance counter support for perf events" depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON) depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP) default y help Enable hardware performance counter support for perf events. If Loading arch/mips/bcm47xx/Kconfig +2 −0 Original line number Diff line number Diff line Loading @@ -9,6 +9,7 @@ config BCM47XX_SSB select SSB_EMBEDDED select SSB_B43_PCI_BRIDGE if PCI select SSB_PCICORE_HOSTMODE if PCI select SSB_DRIVER_GPIO default y help Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support. Loading @@ -23,6 +24,7 @@ config BCM47XX_BCMA select BCMA_DRIVER_MIPS select BCMA_HOST_PCI if PCI select BCMA_DRIVER_PCI_HOSTMODE if PCI select BCMA_DRIVER_GPIO default y help Add support for new Broadcom BCM47xx boards with Broadcom specific Advanced Microcontroller Bus. Loading arch/mips/bcm47xx/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -3,5 +3,5 @@ # under Linux. # obj-y += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o sprom.o obj-y += irq.o nvram.o prom.o serial.o setup.o time.o sprom.o obj-$(CONFIG_BCM47XX_SSB) += wgt634u.o arch/mips/bcm47xx/gpio.cdeleted 100644 → 0 +0 −102 Original line number Diff line number Diff line /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net> */ #include <linux/export.h> #include <linux/ssb/ssb.h> #include <linux/ssb/ssb_driver_chipcommon.h> #include <linux/ssb/ssb_driver_extif.h> #include <asm/mach-bcm47xx/bcm47xx.h> #include <asm/mach-bcm47xx/gpio.h> #if (BCM47XX_CHIPCO_GPIO_LINES > BCM47XX_EXTIF_GPIO_LINES) static DECLARE_BITMAP(gpio_in_use, BCM47XX_CHIPCO_GPIO_LINES); #else static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES); #endif int gpio_request(unsigned gpio, const char *tag) { switch (bcm47xx_bus_type) { #ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) return -EINVAL; if (ssb_extif_available(&bcm47xx_bus.ssb.extif) && ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES)) return -EINVAL; if (test_and_set_bit(gpio, gpio_in_use)) return -EBUSY; return 0; #endif #ifdef CONFIG_BCM47XX_BCMA case BCM47XX_BUS_TYPE_BCMA: if (gpio >= BCM47XX_CHIPCO_GPIO_LINES) return -EINVAL; if (test_and_set_bit(gpio, gpio_in_use)) return -EBUSY; return 0; #endif } return -EINVAL; } EXPORT_SYMBOL(gpio_request); void gpio_free(unsigned gpio) { switch (bcm47xx_bus_type) { #ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) return; if (ssb_extif_available(&bcm47xx_bus.ssb.extif) && ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES)) return; clear_bit(gpio, gpio_in_use); return; #endif #ifdef CONFIG_BCM47XX_BCMA case BCM47XX_BUS_TYPE_BCMA: if (gpio >= BCM47XX_CHIPCO_GPIO_LINES) return; clear_bit(gpio, gpio_in_use); return; #endif } } EXPORT_SYMBOL(gpio_free); int gpio_to_irq(unsigned gpio) { switch (bcm47xx_bus_type) { #ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco)) return ssb_mips_irq(bcm47xx_bus.ssb.chipco.dev) + 2; else if (ssb_extif_available(&bcm47xx_bus.ssb.extif)) return ssb_mips_irq(bcm47xx_bus.ssb.extif.dev) + 2; else return -EINVAL; #endif #ifdef CONFIG_BCM47XX_BCMA case BCM47XX_BUS_TYPE_BCMA: return bcma_core_mips_irq(bcm47xx_bus.bcma.bus.drv_cc.core) + 2; #endif } return -EINVAL; } EXPORT_SYMBOL_GPL(gpio_to_irq); arch/mips/bcm47xx/prom.c +16 −4 Original line number Diff line number Diff line /* * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org> * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net> * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the Loading @@ -27,6 +28,7 @@ #include <linux/types.h> #include <linux/kernel.h> #include <linux/spinlock.h> #include <linux/smp.h> #include <asm/bootinfo.h> #include <asm/fw/cfe/cfe_api.h> #include <asm/fw/cfe/cfe_error.h> Loading Loading @@ -127,6 +129,8 @@ static __init void prom_init_mem(void) { unsigned long mem; unsigned long max; unsigned long off; struct cpuinfo_mips *c = ¤t_cpu_data; /* Figure out memory size by finding aliases. * Loading @@ -143,18 +147,26 @@ static __init void prom_init_mem(void) * max contains the biggest possible address supported by the platform. * If the method wants to try something above we assume 128MB ram. */ max = ((unsigned long)(prom_init) | ((128 << 20) - 1)); off = (unsigned long)prom_init; max = off | ((128 << 20) - 1); for (mem = (1 << 20); mem < (128 << 20); mem += (1 << 20)) { if (((unsigned long)(prom_init) + mem) > max) { if ((off + mem) > max) { mem = (128 << 20); printk(KERN_DEBUG "assume 128MB RAM\n"); break; } if (*(unsigned long *)((unsigned long)(prom_init) + mem) == *(unsigned long *)(prom_init)) if (!memcmp(prom_init, prom_init + mem, 32)) break; } /* Ignoring the last page when ddr size is 128M. Cached * accesses to last page is causing the processor to prefetch * using address above 128M stepping out of the ddr address * space. */ if (c->cputype == CPU_74K && (mem == (128 << 20))) mem -= 0x1000; add_memory_region(0, mem, BOOT_MEM_RAM); } Loading Loading
arch/mips/Kconfig +6 −5 Original line number Diff line number Diff line Loading @@ -106,6 +106,7 @@ config ATH79 config BCM47XX bool "Broadcom BCM47XX based boards" select ARCH_WANT_OPTIONAL_GPIOLIB select CEVT_R4K select CSRC_R4K select DMA_NONCOHERENT Loading @@ -114,7 +115,6 @@ config BCM47XX select IRQ_CPU select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN select GENERIC_GPIO select SYS_HAS_EARLY_PRINTK help Support for BCM47XX based boards Loading Loading @@ -798,7 +798,7 @@ config NLM_XLR_BOARD select CSRC_R4K select IRQ_CPU select ARCH_SUPPORTS_MSI select ZONE_DMA if 64BIT select ZONE_DMA32 if 64BIT select SYNC_R4K select SYS_HAS_EARLY_PRINTK select USB_ARCH_HAS_OHCI if USB_SUPPORT Loading Loading @@ -826,7 +826,7 @@ config NLM_XLP_BOARD select CEVT_R4K select CSRC_R4K select IRQ_CPU select ZONE_DMA if 64BIT select ZONE_DMA32 if 64BIT select SYNC_R4K select SYS_HAS_EARLY_PRINTK select USE_OF Loading Loading @@ -1507,6 +1507,7 @@ config CPU_XLP select WEAK_ORDERING select WEAK_REORDERING_BEYOND_LLSC select CPU_HAS_PREFETCH select CPU_MIPSR2 help Netlogic Microsystems XLP processors. endchoice Loading Loading @@ -1718,7 +1719,7 @@ config CPU_SUPPORTS_UNCACHED_ACCELERATED bool config MIPS_PGD_C0_CONTEXT bool default y if 64BIT && CPU_MIPSR2 default y if 64BIT && CPU_MIPSR2 && !CPU_XLP # # Set to y for ptrace access to watch registers. Loading Loading @@ -2149,7 +2150,7 @@ config NODES_SHIFT config HW_PERF_EVENTS bool "Enable hardware performance counter support for perf events" depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON) depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP) default y help Enable hardware performance counter support for perf events. If Loading
arch/mips/bcm47xx/Kconfig +2 −0 Original line number Diff line number Diff line Loading @@ -9,6 +9,7 @@ config BCM47XX_SSB select SSB_EMBEDDED select SSB_B43_PCI_BRIDGE if PCI select SSB_PCICORE_HOSTMODE if PCI select SSB_DRIVER_GPIO default y help Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support. Loading @@ -23,6 +24,7 @@ config BCM47XX_BCMA select BCMA_DRIVER_MIPS select BCMA_HOST_PCI if PCI select BCMA_DRIVER_PCI_HOSTMODE if PCI select BCMA_DRIVER_GPIO default y help Add support for new Broadcom BCM47xx boards with Broadcom specific Advanced Microcontroller Bus. Loading
arch/mips/bcm47xx/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -3,5 +3,5 @@ # under Linux. # obj-y += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o sprom.o obj-y += irq.o nvram.o prom.o serial.o setup.o time.o sprom.o obj-$(CONFIG_BCM47XX_SSB) += wgt634u.o
arch/mips/bcm47xx/gpio.cdeleted 100644 → 0 +0 −102 Original line number Diff line number Diff line /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net> */ #include <linux/export.h> #include <linux/ssb/ssb.h> #include <linux/ssb/ssb_driver_chipcommon.h> #include <linux/ssb/ssb_driver_extif.h> #include <asm/mach-bcm47xx/bcm47xx.h> #include <asm/mach-bcm47xx/gpio.h> #if (BCM47XX_CHIPCO_GPIO_LINES > BCM47XX_EXTIF_GPIO_LINES) static DECLARE_BITMAP(gpio_in_use, BCM47XX_CHIPCO_GPIO_LINES); #else static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES); #endif int gpio_request(unsigned gpio, const char *tag) { switch (bcm47xx_bus_type) { #ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) return -EINVAL; if (ssb_extif_available(&bcm47xx_bus.ssb.extif) && ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES)) return -EINVAL; if (test_and_set_bit(gpio, gpio_in_use)) return -EBUSY; return 0; #endif #ifdef CONFIG_BCM47XX_BCMA case BCM47XX_BUS_TYPE_BCMA: if (gpio >= BCM47XX_CHIPCO_GPIO_LINES) return -EINVAL; if (test_and_set_bit(gpio, gpio_in_use)) return -EBUSY; return 0; #endif } return -EINVAL; } EXPORT_SYMBOL(gpio_request); void gpio_free(unsigned gpio) { switch (bcm47xx_bus_type) { #ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) return; if (ssb_extif_available(&bcm47xx_bus.ssb.extif) && ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES)) return; clear_bit(gpio, gpio_in_use); return; #endif #ifdef CONFIG_BCM47XX_BCMA case BCM47XX_BUS_TYPE_BCMA: if (gpio >= BCM47XX_CHIPCO_GPIO_LINES) return; clear_bit(gpio, gpio_in_use); return; #endif } } EXPORT_SYMBOL(gpio_free); int gpio_to_irq(unsigned gpio) { switch (bcm47xx_bus_type) { #ifdef CONFIG_BCM47XX_SSB case BCM47XX_BUS_TYPE_SSB: if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco)) return ssb_mips_irq(bcm47xx_bus.ssb.chipco.dev) + 2; else if (ssb_extif_available(&bcm47xx_bus.ssb.extif)) return ssb_mips_irq(bcm47xx_bus.ssb.extif.dev) + 2; else return -EINVAL; #endif #ifdef CONFIG_BCM47XX_BCMA case BCM47XX_BUS_TYPE_BCMA: return bcma_core_mips_irq(bcm47xx_bus.bcma.bus.drv_cc.core) + 2; #endif } return -EINVAL; } EXPORT_SYMBOL_GPL(gpio_to_irq);
arch/mips/bcm47xx/prom.c +16 −4 Original line number Diff line number Diff line /* * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org> * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net> * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the Loading @@ -27,6 +28,7 @@ #include <linux/types.h> #include <linux/kernel.h> #include <linux/spinlock.h> #include <linux/smp.h> #include <asm/bootinfo.h> #include <asm/fw/cfe/cfe_api.h> #include <asm/fw/cfe/cfe_error.h> Loading Loading @@ -127,6 +129,8 @@ static __init void prom_init_mem(void) { unsigned long mem; unsigned long max; unsigned long off; struct cpuinfo_mips *c = ¤t_cpu_data; /* Figure out memory size by finding aliases. * Loading @@ -143,18 +147,26 @@ static __init void prom_init_mem(void) * max contains the biggest possible address supported by the platform. * If the method wants to try something above we assume 128MB ram. */ max = ((unsigned long)(prom_init) | ((128 << 20) - 1)); off = (unsigned long)prom_init; max = off | ((128 << 20) - 1); for (mem = (1 << 20); mem < (128 << 20); mem += (1 << 20)) { if (((unsigned long)(prom_init) + mem) > max) { if ((off + mem) > max) { mem = (128 << 20); printk(KERN_DEBUG "assume 128MB RAM\n"); break; } if (*(unsigned long *)((unsigned long)(prom_init) + mem) == *(unsigned long *)(prom_init)) if (!memcmp(prom_init, prom_init + mem, 32)) break; } /* Ignoring the last page when ddr size is 128M. Cached * accesses to last page is causing the processor to prefetch * using address above 128M stepping out of the ddr address * space. */ if (c->cputype == CPU_74K && (mem == (128 << 20))) mem -= 0x1000; add_memory_region(0, mem, BOOT_MEM_RAM); } Loading