Loading drivers/mmc/host/cmdq_hci.c +5 −0 Original line number Diff line number Diff line Loading @@ -361,6 +361,8 @@ static int cmdq_enable(struct mmc_host *mmc) if (cq_host->ops->clear_set_dumpregs) cq_host->ops->clear_set_dumpregs(mmc, 1); if (cq_host->ops->enhanced_strobe_mask) cq_host->ops->enhanced_strobe_mask(mmc, true); out: cmdq_runtime_pm_put(cq_host); return err; Loading @@ -376,6 +378,9 @@ static void cmdq_disable(struct mmc_host *mmc, bool soft) cq_host, CQCFG) & ~(CQ_ENABLE), CQCFG); } if (cq_host->ops->enhanced_strobe_mask) cq_host->ops->enhanced_strobe_mask(mmc, false); cmdq_runtime_pm_put(cq_host); cq_host->enabled = false; } Loading drivers/mmc/host/cmdq_hci.h +1 −0 Original line number Diff line number Diff line Loading @@ -199,6 +199,7 @@ struct cmdq_host_ops { void (*write_l)(struct cmdq_host *host, u32 val, int reg); u32 (*read_l)(struct cmdq_host *host, int reg); void (*clear_set_dumpregs)(struct mmc_host *mmc, bool set); void (*enhanced_strobe_mask)(struct mmc_host *mmc, bool set); int (*reset)(struct mmc_host *mmc); int (*crypto_cfg)(struct mmc_host *mmc, struct mmc_request *mrq, u32 slot); Loading drivers/mmc/host/sdhci-msm.c +31 −0 Original line number Diff line number Diff line Loading @@ -157,6 +157,7 @@ #define CORE_VENDOR_SPEC3 0x1B0 #define CORE_PWRSAVE_DLL (1 << 3) #define CORE_CMDEN_HS400_INPUT_MASK_CNT (1 << 13) #define CORE_DLL_CONFIG_2 0x1B4 #define CORE_DDR_CAL_EN (1 << 0) Loading Loading @@ -2795,6 +2796,35 @@ void sdhci_msm_reset(struct sdhci_host *host, u8 mask) sdhci_reset(host, mask); } /* * sdhci_msm_enhanced_strobe_mask :- * Before running CMDQ transfers in HS400 Enhanced Strobe mode, * SW should write 3 to * HC_VENDOR_SPECIFIC_FUNC3.CMDEN_HS400_INPUT_MASK_CNT register. * The default reset value of this register is 2. */ static void sdhci_msm_enhanced_strobe_mask(struct sdhci_host *host, bool set) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = pltfm_host->priv; if (!msm_host->enhanced_strobe) { pr_debug("%s: host does not support hs400 enhanced strobe\n", mmc_hostname(host->mmc)); return; } if (set) { writel_relaxed((readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC3) | CORE_CMDEN_HS400_INPUT_MASK_CNT), host->ioaddr + CORE_VENDOR_SPEC3); } else { writel_relaxed((readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC3) & ~CORE_CMDEN_HS400_INPUT_MASK_CNT), host->ioaddr + CORE_VENDOR_SPEC3); } } static void sdhci_msm_clear_set_dumpregs(struct sdhci_host *host, bool set) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); Loading Loading @@ -2829,6 +2859,7 @@ static struct sdhci_ops sdhci_msm_ops = { .set_bus_width = sdhci_set_bus_width, .reset = sdhci_msm_reset, .clear_set_dumpregs = sdhci_msm_clear_set_dumpregs, .enhanced_strobe_mask = sdhci_msm_enhanced_strobe_mask, }; static void sdhci_set_default_hw_caps(struct sdhci_msm_host *msm_host, Loading drivers/mmc/host/sdhci.c +14 −0 Original line number Diff line number Diff line Loading @@ -3506,6 +3506,14 @@ static void sdhci_cmdq_set_block_size(struct mmc_host *mmc) sdhci_set_blk_size_reg(host, 512, 0); } static void sdhci_enhanced_strobe_mask(struct mmc_host *mmc, bool set) { struct sdhci_host *host = mmc_priv(mmc); if (host->ops->enhanced_strobe_mask) host->ops->enhanced_strobe_mask(host, set); } static void sdhci_cmdq_clear_set_dumpregs(struct mmc_host *mmc, bool set) { struct sdhci_host *host = mmc_priv(mmc); Loading Loading @@ -3559,6 +3567,11 @@ static void sdhci_cmdq_set_block_size(struct mmc_host *mmc) } static void sdhci_enhanced_strobe_mask(struct mmc_host *mmc, bool set) { } static void sdhci_cmdq_clear_set_dumpregs(struct mmc_host *mmc, bool set) { Loading @@ -3580,6 +3593,7 @@ static const struct cmdq_host_ops sdhci_cmdq_ops = { .dump_vendor_regs = sdhci_cmdq_dump_vendor_regs, .set_block_size = sdhci_cmdq_set_block_size, .clear_set_dumpregs = sdhci_cmdq_clear_set_dumpregs, .enhanced_strobe_mask = sdhci_enhanced_strobe_mask, .crypto_cfg = sdhci_cmdq_crypto_cfg, .post_cqe_halt = sdhci_cmdq_post_cqe_halt, }; Loading drivers/mmc/host/sdhci.h +1 −0 Original line number Diff line number Diff line Loading @@ -328,6 +328,7 @@ struct sdhci_ops { u32 type); int (*enable_controller_clock)(struct sdhci_host *host); void (*clear_set_dumpregs)(struct sdhci_host *host, bool set); void (*enhanced_strobe_mask)(struct sdhci_host *host, bool set); }; #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS Loading Loading
drivers/mmc/host/cmdq_hci.c +5 −0 Original line number Diff line number Diff line Loading @@ -361,6 +361,8 @@ static int cmdq_enable(struct mmc_host *mmc) if (cq_host->ops->clear_set_dumpregs) cq_host->ops->clear_set_dumpregs(mmc, 1); if (cq_host->ops->enhanced_strobe_mask) cq_host->ops->enhanced_strobe_mask(mmc, true); out: cmdq_runtime_pm_put(cq_host); return err; Loading @@ -376,6 +378,9 @@ static void cmdq_disable(struct mmc_host *mmc, bool soft) cq_host, CQCFG) & ~(CQ_ENABLE), CQCFG); } if (cq_host->ops->enhanced_strobe_mask) cq_host->ops->enhanced_strobe_mask(mmc, false); cmdq_runtime_pm_put(cq_host); cq_host->enabled = false; } Loading
drivers/mmc/host/cmdq_hci.h +1 −0 Original line number Diff line number Diff line Loading @@ -199,6 +199,7 @@ struct cmdq_host_ops { void (*write_l)(struct cmdq_host *host, u32 val, int reg); u32 (*read_l)(struct cmdq_host *host, int reg); void (*clear_set_dumpregs)(struct mmc_host *mmc, bool set); void (*enhanced_strobe_mask)(struct mmc_host *mmc, bool set); int (*reset)(struct mmc_host *mmc); int (*crypto_cfg)(struct mmc_host *mmc, struct mmc_request *mrq, u32 slot); Loading
drivers/mmc/host/sdhci-msm.c +31 −0 Original line number Diff line number Diff line Loading @@ -157,6 +157,7 @@ #define CORE_VENDOR_SPEC3 0x1B0 #define CORE_PWRSAVE_DLL (1 << 3) #define CORE_CMDEN_HS400_INPUT_MASK_CNT (1 << 13) #define CORE_DLL_CONFIG_2 0x1B4 #define CORE_DDR_CAL_EN (1 << 0) Loading Loading @@ -2795,6 +2796,35 @@ void sdhci_msm_reset(struct sdhci_host *host, u8 mask) sdhci_reset(host, mask); } /* * sdhci_msm_enhanced_strobe_mask :- * Before running CMDQ transfers in HS400 Enhanced Strobe mode, * SW should write 3 to * HC_VENDOR_SPECIFIC_FUNC3.CMDEN_HS400_INPUT_MASK_CNT register. * The default reset value of this register is 2. */ static void sdhci_msm_enhanced_strobe_mask(struct sdhci_host *host, bool set) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = pltfm_host->priv; if (!msm_host->enhanced_strobe) { pr_debug("%s: host does not support hs400 enhanced strobe\n", mmc_hostname(host->mmc)); return; } if (set) { writel_relaxed((readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC3) | CORE_CMDEN_HS400_INPUT_MASK_CNT), host->ioaddr + CORE_VENDOR_SPEC3); } else { writel_relaxed((readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC3) & ~CORE_CMDEN_HS400_INPUT_MASK_CNT), host->ioaddr + CORE_VENDOR_SPEC3); } } static void sdhci_msm_clear_set_dumpregs(struct sdhci_host *host, bool set) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); Loading Loading @@ -2829,6 +2859,7 @@ static struct sdhci_ops sdhci_msm_ops = { .set_bus_width = sdhci_set_bus_width, .reset = sdhci_msm_reset, .clear_set_dumpregs = sdhci_msm_clear_set_dumpregs, .enhanced_strobe_mask = sdhci_msm_enhanced_strobe_mask, }; static void sdhci_set_default_hw_caps(struct sdhci_msm_host *msm_host, Loading
drivers/mmc/host/sdhci.c +14 −0 Original line number Diff line number Diff line Loading @@ -3506,6 +3506,14 @@ static void sdhci_cmdq_set_block_size(struct mmc_host *mmc) sdhci_set_blk_size_reg(host, 512, 0); } static void sdhci_enhanced_strobe_mask(struct mmc_host *mmc, bool set) { struct sdhci_host *host = mmc_priv(mmc); if (host->ops->enhanced_strobe_mask) host->ops->enhanced_strobe_mask(host, set); } static void sdhci_cmdq_clear_set_dumpregs(struct mmc_host *mmc, bool set) { struct sdhci_host *host = mmc_priv(mmc); Loading Loading @@ -3559,6 +3567,11 @@ static void sdhci_cmdq_set_block_size(struct mmc_host *mmc) } static void sdhci_enhanced_strobe_mask(struct mmc_host *mmc, bool set) { } static void sdhci_cmdq_clear_set_dumpregs(struct mmc_host *mmc, bool set) { Loading @@ -3580,6 +3593,7 @@ static const struct cmdq_host_ops sdhci_cmdq_ops = { .dump_vendor_regs = sdhci_cmdq_dump_vendor_regs, .set_block_size = sdhci_cmdq_set_block_size, .clear_set_dumpregs = sdhci_cmdq_clear_set_dumpregs, .enhanced_strobe_mask = sdhci_enhanced_strobe_mask, .crypto_cfg = sdhci_cmdq_crypto_cfg, .post_cqe_halt = sdhci_cmdq_post_cqe_halt, }; Loading
drivers/mmc/host/sdhci.h +1 −0 Original line number Diff line number Diff line Loading @@ -328,6 +328,7 @@ struct sdhci_ops { u32 type); int (*enable_controller_clock)(struct sdhci_host *host); void (*clear_set_dumpregs)(struct sdhci_host *host, bool set); void (*enhanced_strobe_mask)(struct sdhci_host *host, bool set); }; #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS Loading