Loading arch/arm/mach-omap2/Makefile +3 −2 Original line number Diff line number Diff line Loading @@ -90,8 +90,9 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ # OMAP voltage domains ifeq ($(CONFIG_PM),y) voltagedomain-common := voltage.o obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) voltagedomain-common := voltage.o vc.o vp.o obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ voltagedomains2xxx_data.o obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ voltagedomains3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) \ Loading arch/arm/mach-omap2/io.c +5 −0 Original line number Diff line number Diff line Loading @@ -38,6 +38,7 @@ #include "io.h" #include <plat/omap-pm.h> #include "voltage.h" #include "powerdomain.h" #include "clockdomain.h" Loading Loading @@ -341,18 +342,22 @@ void __init omap2_init_common_infrastructure(void) u8 postsetup_state; if (cpu_is_omap242x()) { omap2xxx_voltagedomains_init(); omap242x_powerdomains_init(); omap242x_clockdomains_init(); omap2420_hwmod_init(); } else if (cpu_is_omap243x()) { omap2xxx_voltagedomains_init(); omap243x_powerdomains_init(); omap243x_clockdomains_init(); omap2430_hwmod_init(); } else if (cpu_is_omap34xx()) { omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); omap3xxx_clockdomains_init(); omap3xxx_hwmod_init(); } else if (cpu_is_omap44xx()) { omap44xx_voltagedomains_init(); omap44xx_powerdomains_init(); omap44xx_clockdomains_init(); omap44xx_hwmod_init(); Loading arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +2 −2 Original line number Diff line number Diff line Loading @@ -2542,7 +2542,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { .name = "sr1_hwmod", .class = &omap34xx_smartreflex_hwmod_class, .main_clk = "sr1_fck", .vdd_name = "mpu", .vdd_name = "mpu_iva", .prcm = { .omap2 = { .prcm_reg_id = 1, Loading @@ -2561,7 +2561,7 @@ static struct omap_hwmod omap36xx_sr1_hwmod = { .name = "sr1_hwmod", .class = &omap36xx_smartreflex_hwmod_class, .main_clk = "sr1_fck", .vdd_name = "mpu", .vdd_name = "mpu_iva", .prcm = { .omap2 = { .prcm_reg_id = 1, Loading arch/arm/mach-omap2/omap_twl.c +63 −44 Original line number Diff line number Diff line Loading @@ -42,8 +42,11 @@ #define OMAP4_SRI2C_SLAVE_ADDR 0x12 #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55 #define OMAP4_VDD_MPU_SR_CMD_REG 0x56 #define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B #define OMAP4_VDD_IVA_SR_CMD_REG 0x5C #define OMAP4_VDD_CORE_SR_VOLT_REG 0x61 #define OMAP4_VDD_CORE_SR_CMD_REG 0x62 #define OMAP4_VP_CONFIG_ERROROFFSET 0x00 #define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01 Loading Loading @@ -95,6 +98,8 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) is_offset_valid = true; } if (!vsel) return 0; /* * There is no specific formula for voltage to vsel * conversion above 1.3V. There are special hardcoded Loading @@ -106,9 +111,9 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) return 1350000; if (smps_offset & 0x8) return ((((vsel - 1) * 125) + 7000)) * 100; return ((((vsel - 1) * 1266) + 70900)) * 10; else return ((((vsel - 1) * 125) + 6000)) * 100; return ((((vsel - 1) * 1266) + 60770)) * 10; } static u8 twl6030_uv_to_vsel(unsigned long uv) Loading @@ -127,6 +132,8 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) is_offset_valid = true; } if (!uv) return 0x00; /* * There is no specific formula for voltage to vsel * conversion above 1.3V. There are special hardcoded Loading @@ -134,16 +141,21 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) * hardcoding only for 1.35 V which is used for 1GH OPP for * OMAP4430. */ if (uv > twl6030_vsel_to_uv(0x39)) { if (uv == 1350000) return 0x3A; pr_err("%s:OUT OF RANGE! non mapped vsel for %ld Vs max %ld\n", __func__, uv, twl6030_vsel_to_uv(0x39)); return 0x3A; } if (smps_offset & 0x8) return DIV_ROUND_UP(uv - 700000, 12500) + 1; return DIV_ROUND_UP(uv - 709000, 12660) + 1; else return DIV_ROUND_UP(uv - 600000, 12500) + 1; return DIV_ROUND_UP(uv - 607700, 12660) + 1; } static struct omap_volt_pmic_info omap3_mpu_volt_info = { static struct omap_voltdm_pmic omap3_mpu_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1200000, Loading @@ -158,12 +170,13 @@ static struct omap_volt_pmic_info omap3_mpu_volt_info = { .vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, .pmic_reg = OMAP3_VDD_MPU_SR_CONTROL_REG, .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, .i2c_high_speed = true, .vsel_to_uv = twl4030_vsel_to_uv, .uv_to_vsel = twl4030_uv_to_vsel, }; static struct omap_volt_pmic_info omap3_core_volt_info = { static struct omap_voltdm_pmic omap3_core_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1200000, Loading @@ -178,18 +191,19 @@ static struct omap_volt_pmic_info omap3_core_volt_info = { .vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, .pmic_reg = OMAP3_VDD_CORE_SR_CONTROL_REG, .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, .i2c_high_speed = true, .vsel_to_uv = twl4030_vsel_to_uv, .uv_to_vsel = twl4030_uv_to_vsel, }; static struct omap_volt_pmic_info omap4_mpu_volt_info = { static struct omap_voltdm_pmic omap4_mpu_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1350000, .onlp_volt = 1350000, .ret_volt = 837500, .off_volt = 600000, .step_size = 12660, .on_volt = 1375000, .onlp_volt = 1375000, .ret_volt = 830000, .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, Loading @@ -198,18 +212,20 @@ static struct omap_volt_pmic_info omap4_mpu_volt_info = { .vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .pmic_reg = OMAP4_VDD_MPU_SR_VOLT_REG, .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, .cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG, .i2c_high_speed = true, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; static struct omap_volt_pmic_info omap4_iva_volt_info = { static struct omap_voltdm_pmic omap4_iva_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1100000, .onlp_volt = 1100000, .ret_volt = 837500, .off_volt = 600000, .step_size = 12660, .on_volt = 1188000, .onlp_volt = 1188000, .ret_volt = 830000, .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, Loading @@ -218,18 +234,20 @@ static struct omap_volt_pmic_info omap4_iva_volt_info = { .vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .pmic_reg = OMAP4_VDD_IVA_SR_VOLT_REG, .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, .cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG, .i2c_high_speed = true, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; static struct omap_volt_pmic_info omap4_core_volt_info = { static struct omap_voltdm_pmic omap4_core_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1100000, .onlp_volt = 1100000, .ret_volt = 837500, .off_volt = 600000, .step_size = 12660, .on_volt = 1200000, .onlp_volt = 1200000, .ret_volt = 830000, .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, Loading @@ -238,7 +256,8 @@ static struct omap_volt_pmic_info omap4_core_volt_info = { .vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .pmic_reg = OMAP4_VDD_CORE_SR_VOLT_REG, .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, .cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; Loading @@ -250,14 +269,14 @@ int __init omap4_twl_init(void) if (!cpu_is_omap44xx()) return -ENODEV; voltdm = omap_voltage_domain_lookup("mpu"); omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info); voltdm = voltdm_lookup("mpu"); omap_voltage_register_pmic(voltdm, &omap4_mpu_pmic); voltdm = omap_voltage_domain_lookup("iva"); omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info); voltdm = voltdm_lookup("iva"); omap_voltage_register_pmic(voltdm, &omap4_iva_pmic); voltdm = omap_voltage_domain_lookup("core"); omap_voltage_register_pmic(voltdm, &omap4_core_volt_info); voltdm = voltdm_lookup("core"); omap_voltage_register_pmic(voltdm, &omap4_core_pmic); return 0; } Loading @@ -270,10 +289,10 @@ int __init omap3_twl_init(void) return -ENODEV; if (cpu_is_omap3630()) { omap3_mpu_volt_info.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; omap3_mpu_volt_info.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; omap3_core_volt_info.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; omap3_core_volt_info.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; } /* Loading @@ -288,11 +307,11 @@ int __init omap3_twl_init(void) if (!twl_sr_enable_autoinit) omap3_twl_set_sr_bit(true); voltdm = omap_voltage_domain_lookup("mpu"); omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); voltdm = voltdm_lookup("mpu_iva"); omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic); voltdm = omap_voltage_domain_lookup("core"); omap_voltage_register_pmic(voltdm, &omap3_core_volt_info); voltdm = voltdm_lookup("core"); omap_voltage_register_pmic(voltdm, &omap3_core_pmic); return 0; } Loading arch/arm/mach-omap2/pm.c +3 −3 Original line number Diff line number Diff line Loading @@ -181,7 +181,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, goto exit; } voltdm = omap_voltage_domain_lookup(vdd_name); voltdm = voltdm_lookup(vdd_name); if (IS_ERR(voltdm)) { printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n", __func__, vdd_name); Loading Loading @@ -212,7 +212,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, goto exit; } omap_voltage_scale_vdd(voltdm, bootup_volt); voltdm_scale(voltdm, bootup_volt); return 0; exit: Loading @@ -226,7 +226,7 @@ static void __init omap3_init_voltages(void) if (!cpu_is_omap34xx()) return; omap2_set_init_voltage("mpu", "dpll1_ck", mpu_dev); omap2_set_init_voltage("mpu_iva", "dpll1_ck", mpu_dev); omap2_set_init_voltage("core", "l3_ick", l3_dev); } Loading Loading
arch/arm/mach-omap2/Makefile +3 −2 Original line number Diff line number Diff line Loading @@ -90,8 +90,9 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ # OMAP voltage domains ifeq ($(CONFIG_PM),y) voltagedomain-common := voltage.o obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) voltagedomain-common := voltage.o vc.o vp.o obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ voltagedomains2xxx_data.o obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ voltagedomains3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) \ Loading
arch/arm/mach-omap2/io.c +5 −0 Original line number Diff line number Diff line Loading @@ -38,6 +38,7 @@ #include "io.h" #include <plat/omap-pm.h> #include "voltage.h" #include "powerdomain.h" #include "clockdomain.h" Loading Loading @@ -341,18 +342,22 @@ void __init omap2_init_common_infrastructure(void) u8 postsetup_state; if (cpu_is_omap242x()) { omap2xxx_voltagedomains_init(); omap242x_powerdomains_init(); omap242x_clockdomains_init(); omap2420_hwmod_init(); } else if (cpu_is_omap243x()) { omap2xxx_voltagedomains_init(); omap243x_powerdomains_init(); omap243x_clockdomains_init(); omap2430_hwmod_init(); } else if (cpu_is_omap34xx()) { omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); omap3xxx_clockdomains_init(); omap3xxx_hwmod_init(); } else if (cpu_is_omap44xx()) { omap44xx_voltagedomains_init(); omap44xx_powerdomains_init(); omap44xx_clockdomains_init(); omap44xx_hwmod_init(); Loading
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +2 −2 Original line number Diff line number Diff line Loading @@ -2542,7 +2542,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { .name = "sr1_hwmod", .class = &omap34xx_smartreflex_hwmod_class, .main_clk = "sr1_fck", .vdd_name = "mpu", .vdd_name = "mpu_iva", .prcm = { .omap2 = { .prcm_reg_id = 1, Loading @@ -2561,7 +2561,7 @@ static struct omap_hwmod omap36xx_sr1_hwmod = { .name = "sr1_hwmod", .class = &omap36xx_smartreflex_hwmod_class, .main_clk = "sr1_fck", .vdd_name = "mpu", .vdd_name = "mpu_iva", .prcm = { .omap2 = { .prcm_reg_id = 1, Loading
arch/arm/mach-omap2/omap_twl.c +63 −44 Original line number Diff line number Diff line Loading @@ -42,8 +42,11 @@ #define OMAP4_SRI2C_SLAVE_ADDR 0x12 #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55 #define OMAP4_VDD_MPU_SR_CMD_REG 0x56 #define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B #define OMAP4_VDD_IVA_SR_CMD_REG 0x5C #define OMAP4_VDD_CORE_SR_VOLT_REG 0x61 #define OMAP4_VDD_CORE_SR_CMD_REG 0x62 #define OMAP4_VP_CONFIG_ERROROFFSET 0x00 #define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01 Loading Loading @@ -95,6 +98,8 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) is_offset_valid = true; } if (!vsel) return 0; /* * There is no specific formula for voltage to vsel * conversion above 1.3V. There are special hardcoded Loading @@ -106,9 +111,9 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) return 1350000; if (smps_offset & 0x8) return ((((vsel - 1) * 125) + 7000)) * 100; return ((((vsel - 1) * 1266) + 70900)) * 10; else return ((((vsel - 1) * 125) + 6000)) * 100; return ((((vsel - 1) * 1266) + 60770)) * 10; } static u8 twl6030_uv_to_vsel(unsigned long uv) Loading @@ -127,6 +132,8 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) is_offset_valid = true; } if (!uv) return 0x00; /* * There is no specific formula for voltage to vsel * conversion above 1.3V. There are special hardcoded Loading @@ -134,16 +141,21 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) * hardcoding only for 1.35 V which is used for 1GH OPP for * OMAP4430. */ if (uv > twl6030_vsel_to_uv(0x39)) { if (uv == 1350000) return 0x3A; pr_err("%s:OUT OF RANGE! non mapped vsel for %ld Vs max %ld\n", __func__, uv, twl6030_vsel_to_uv(0x39)); return 0x3A; } if (smps_offset & 0x8) return DIV_ROUND_UP(uv - 700000, 12500) + 1; return DIV_ROUND_UP(uv - 709000, 12660) + 1; else return DIV_ROUND_UP(uv - 600000, 12500) + 1; return DIV_ROUND_UP(uv - 607700, 12660) + 1; } static struct omap_volt_pmic_info omap3_mpu_volt_info = { static struct omap_voltdm_pmic omap3_mpu_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1200000, Loading @@ -158,12 +170,13 @@ static struct omap_volt_pmic_info omap3_mpu_volt_info = { .vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, .pmic_reg = OMAP3_VDD_MPU_SR_CONTROL_REG, .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, .i2c_high_speed = true, .vsel_to_uv = twl4030_vsel_to_uv, .uv_to_vsel = twl4030_uv_to_vsel, }; static struct omap_volt_pmic_info omap3_core_volt_info = { static struct omap_voltdm_pmic omap3_core_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1200000, Loading @@ -178,18 +191,19 @@ static struct omap_volt_pmic_info omap3_core_volt_info = { .vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, .pmic_reg = OMAP3_VDD_CORE_SR_CONTROL_REG, .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, .i2c_high_speed = true, .vsel_to_uv = twl4030_vsel_to_uv, .uv_to_vsel = twl4030_uv_to_vsel, }; static struct omap_volt_pmic_info omap4_mpu_volt_info = { static struct omap_voltdm_pmic omap4_mpu_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1350000, .onlp_volt = 1350000, .ret_volt = 837500, .off_volt = 600000, .step_size = 12660, .on_volt = 1375000, .onlp_volt = 1375000, .ret_volt = 830000, .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, Loading @@ -198,18 +212,20 @@ static struct omap_volt_pmic_info omap4_mpu_volt_info = { .vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .pmic_reg = OMAP4_VDD_MPU_SR_VOLT_REG, .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, .cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG, .i2c_high_speed = true, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; static struct omap_volt_pmic_info omap4_iva_volt_info = { static struct omap_voltdm_pmic omap4_iva_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1100000, .onlp_volt = 1100000, .ret_volt = 837500, .off_volt = 600000, .step_size = 12660, .on_volt = 1188000, .onlp_volt = 1188000, .ret_volt = 830000, .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, Loading @@ -218,18 +234,20 @@ static struct omap_volt_pmic_info omap4_iva_volt_info = { .vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .pmic_reg = OMAP4_VDD_IVA_SR_VOLT_REG, .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, .cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG, .i2c_high_speed = true, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; static struct omap_volt_pmic_info omap4_core_volt_info = { static struct omap_voltdm_pmic omap4_core_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1100000, .onlp_volt = 1100000, .ret_volt = 837500, .off_volt = 600000, .step_size = 12660, .on_volt = 1200000, .onlp_volt = 1200000, .ret_volt = 830000, .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, Loading @@ -238,7 +256,8 @@ static struct omap_volt_pmic_info omap4_core_volt_info = { .vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .pmic_reg = OMAP4_VDD_CORE_SR_VOLT_REG, .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, .cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; Loading @@ -250,14 +269,14 @@ int __init omap4_twl_init(void) if (!cpu_is_omap44xx()) return -ENODEV; voltdm = omap_voltage_domain_lookup("mpu"); omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info); voltdm = voltdm_lookup("mpu"); omap_voltage_register_pmic(voltdm, &omap4_mpu_pmic); voltdm = omap_voltage_domain_lookup("iva"); omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info); voltdm = voltdm_lookup("iva"); omap_voltage_register_pmic(voltdm, &omap4_iva_pmic); voltdm = omap_voltage_domain_lookup("core"); omap_voltage_register_pmic(voltdm, &omap4_core_volt_info); voltdm = voltdm_lookup("core"); omap_voltage_register_pmic(voltdm, &omap4_core_pmic); return 0; } Loading @@ -270,10 +289,10 @@ int __init omap3_twl_init(void) return -ENODEV; if (cpu_is_omap3630()) { omap3_mpu_volt_info.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; omap3_mpu_volt_info.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; omap3_core_volt_info.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; omap3_core_volt_info.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; } /* Loading @@ -288,11 +307,11 @@ int __init omap3_twl_init(void) if (!twl_sr_enable_autoinit) omap3_twl_set_sr_bit(true); voltdm = omap_voltage_domain_lookup("mpu"); omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); voltdm = voltdm_lookup("mpu_iva"); omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic); voltdm = omap_voltage_domain_lookup("core"); omap_voltage_register_pmic(voltdm, &omap3_core_volt_info); voltdm = voltdm_lookup("core"); omap_voltage_register_pmic(voltdm, &omap3_core_pmic); return 0; } Loading
arch/arm/mach-omap2/pm.c +3 −3 Original line number Diff line number Diff line Loading @@ -181,7 +181,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, goto exit; } voltdm = omap_voltage_domain_lookup(vdd_name); voltdm = voltdm_lookup(vdd_name); if (IS_ERR(voltdm)) { printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n", __func__, vdd_name); Loading Loading @@ -212,7 +212,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, goto exit; } omap_voltage_scale_vdd(voltdm, bootup_volt); voltdm_scale(voltdm, bootup_volt); return 0; exit: Loading @@ -226,7 +226,7 @@ static void __init omap3_init_voltages(void) if (!cpu_is_omap34xx()) return; omap2_set_init_voltage("mpu", "dpll1_ck", mpu_dev); omap2_set_init_voltage("mpu_iva", "dpll1_ck", mpu_dev); omap2_set_init_voltage("core", "l3_ick", l3_dev); } Loading