Commit 2353b47b authored Dec 05, 2012 by Bernd Faust Committed by John Stultz Jan 15, 2013

Round the calculated scale factor in set_cyc2ns_scale()



During some experiments with an external clock (in a FPGA), we saw that
the TSC clock drifted approx. 2.5ms per second.

This drift was caused by the current way of calculating the scale.
In our case cpu_khz had a value of 3292725. This resulted in a scale
value of 310. But when doing the calculation by hand it shows that the
actual value is 310.9886188491, so a value of 311 would be more precise.

With this change the value is rounded.

Signed-off-by: Bernd Faust <berndfaust@gmail.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>

parent 023f333a

arch/x86/kernel/tsc.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -617,7 +617,8 @@ static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
		ns_now = __cycles_2_ns(tsc_now);

		if (cpu_khz) {
		*scale = (NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR)/cpu_khz;
		*scale = ((NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR) +
		cpu_khz / 2) / cpu_khz;
		offset = ns_now - mult_frac(tsc_now, scale,
		(1UL << CYC2NS_SCALE_FACTOR));
		}