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Commit 23026285 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-fixes-3.12' of git://people.freedesktop.org/~agd5f/linux into drm-fixes 

Regression fixes for audio and UVD, several hang fixes,
some DPM fixes.

* 'drm-fixes-3.12' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: re-enable sw ACR support on pre-DCE4
  drm/radeon/dpm: disable bapm on TN asics
  drm/radeon: improve soft reset on CIK
  drm/radeon: improve soft reset on SI
  drm/radeon/dpm: off by one in si_set_mc_special_registers()
  drm/radeon/dpm/btc: off by one in btc_set_mc_special_registers()
  drm/radeon: forever loop on error in radeon_do_test_moves()
  drm/radeon: fix hw contexts for SUMO2 asics
  drm/radeon: fix typo in CP DMA register headers
  drm/radeon/dpm: disable multiple UVD states
  drm/radeon: use hw generated CTS/N values for audio
  drm/radeon: fix N/CTS clock matching for audio
  drm/radeon: use 64-bit math to calculate CTS values for audio (v2)
  drm/edid: catch kmalloc failure in drm_edid_to_speaker_allocation
parents ecc7e6f3 b852c985

drivers/gpu/drm/drm_edid.c

+2 −0
Original line number Diff line number Diff line
@@ -2925,6 +2925,8 @@ int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb) 
			/* Speaker Allocation Data Block */

			if (dbl == 3) {

				*sadb = kmalloc(dbl, GFP_KERNEL);

				if (!*sadb)

					return -ENOMEM;

				memcpy(*sadb, &db[1], dbl);

				count = dbl;

				break;

drivers/gpu/drm/radeon/btc_dpm.c

+3 −3
Original line number Diff line number Diff line
@@ -1930,7 +1930,7 @@ static int btc_set_mc_special_registers(struct radeon_device *rdev, 
			}

			j++;



			if (j > SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE)

			if (j >= SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE)

				return -EINVAL;



			tmp = RREG32(MC_PMG_CMD_MRS);
@@ -1945,7 +1945,7 @@ static int btc_set_mc_special_registers(struct radeon_device *rdev, 
			}

			j++;



			if (j > SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE)

			if (j >= SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE)

				return -EINVAL;

			break;

		case MC_SEQ_RESERVE_M >> 2:
@@ -1959,7 +1959,7 @@ static int btc_set_mc_special_registers(struct radeon_device *rdev, 
			}

			j++;



			if (j > SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE)

			if (j >= SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE)

				return -EINVAL;

			break;

		default:

drivers/gpu/drm/radeon/cik.c

+6 −0
Original line number Diff line number Diff line
@@ -77,6 +77,8 @@ static void cik_pcie_gen3_enable(struct radeon_device *rdev); 
static void cik_program_aspm(struct radeon_device *rdev);

static void cik_init_pg(struct radeon_device *rdev);

static void cik_init_cg(struct radeon_device *rdev);

static void cik_fini_pg(struct radeon_device *rdev);

static void cik_fini_cg(struct radeon_device *rdev);

static void cik_enable_gui_idle_interrupt(struct radeon_device *rdev,

					  bool enable);
@@ -4185,6 +4187,10 @@ static void cik_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) 
	dev_info(rdev->dev, "  VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n",

		 RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS));



	/* disable CG/PG */

	cik_fini_pg(rdev);

	cik_fini_cg(rdev);



	/* stop the rlc */

	cik_rlc_stop(rdev);

drivers/gpu/drm/radeon/evergreen.c

+1 −1
Original line number Diff line number Diff line
@@ -3131,7 +3131,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev) 
		rdev->config.evergreen.sx_max_export_size = 256;

		rdev->config.evergreen.sx_max_export_pos_size = 64;

		rdev->config.evergreen.sx_max_export_smx_size = 192;

		rdev->config.evergreen.max_hw_contexts = 8;

		rdev->config.evergreen.max_hw_contexts = 4;

		rdev->config.evergreen.sq_num_cf_insts = 2;



		rdev->config.evergreen.sc_prim_fifo_size = 0x40;

drivers/gpu/drm/radeon/evergreen_hdmi.c

+1 −2
Original line number Diff line number Diff line
@@ -288,8 +288,7 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode 
	/* fglrx clears sth in AFMT_AUDIO_PACKET_CONTROL2 here */



	WREG32(HDMI_ACR_PACKET_CONTROL + offset,

	       HDMI_ACR_AUTO_SEND | /* allow hw to sent ACR packets when required */

	       HDMI_ACR_SOURCE); /* select SW CTS value */

	       HDMI_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */



	evergreen_hdmi_update_ACR(encoder, mode->clock);