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Commit 21af0297 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (68 commits)
  [MIPS] remove Documentation/mips/GT64120.README
  [MIPS] Malta: remaining bits of the board support code cleanup
  [MIPS] Malta: make the helper function static
  [MIPS] Malta: fix braces at single statement blocks
  [MIPS] Malta, Atlas: move an extern function declaration to the header file
  [MIPS] Malta: Use C89 style for comments
  [MIPS] Malta: else should follow close brace in malta_int.c
  [MIPS] Malta: remove a superfluous comment
  [MIPS] Malta: include <linux/cpu.h> instead of <asm/cpu.h>
  [MIPS] Malta, Atlas, Sead: remove an extern from .c files
  [MIPS] Malta: fix oversized lines in malta_int.c
  [MIPS] Malta: remove a dead function declaration
  [MIPS] Malta: use tabs not spaces
  [MIPS] Malta: set up the screen info in a separate function
  [MIPS] Malta: check the PCI clock frequency in a separate function
  [MIPS] Malta: use the KERN_ facility level in printk()
  [MIPS] Malta: use Linux kernel style for structure initialization
  [MIPS]: constify function pointer tables
  [MIPS] compat: handle argument endianess of sys32_(f)truncate64 with merge_64
  [MIPS] Cobalt 64-bits kernels can be safely unmarked experimental
  ...
parents 5ea293a9 a9d2517c
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+0 −2
Original line number Diff line number Diff line
@@ -2,5 +2,3 @@
	- this file.
AU1xxx_IDE.README
	- README for MIPS AU1XXX IDE driver.
GT64120.README
	- README for dir with info on MIPS boards using GT-64120 or GT-64120A.

Documentation/mips/GT64120.README

deleted100644 → 0
+0 −65
Original line number Diff line number Diff line
README for arch/mips/gt64120 directory and subdirectories

Jun Sun, jsun@mvista.com or jsun@junsun.net
01/27, 2001

MOTIVATION
----------

Many MIPS boards share the same system controller (or CPU companian chip),
such as GT-64120.  It is highly desirable to let these boards share
the same controller code instead of duplicating them.

This directory is meant to hold all MIPS boards that use GT-64120 or GT-64120A.


HOW TO ADD A BOARD
------------------
 
. Create a subdirectory include/asm/gt64120/<board>.  

. Create a file called gt64120_dep.h under that directory.

. Modify include/asm/gt64120/gt64120.h file to include the new gt64120_dep.h
  based on config options.  The board-dep section is at the end of 
  include/asm/gt64120/gt64120.h file. There you can find all required
  definitions include/asm/gt64120/<board>/gt64120_dep.h file must supply.

. Create a subdirectory arch/mips/gt64120/<board> directory to hold
  board specific routines.

. The GT-64120 common code is supplied under arch/mips/gt64120/common directory.
  It includes:
	1) arch/mips/gt64120/pci.c -
		common PCI routine, include the top-level pcibios_init()
	2) arch/mips/gt64120/irq.c -
		common IRQ routine, include the top-level do_IRQ() 
	   [This part really belongs to arch/mips/kernel. jsun]
 	3) arch/mips/gt64120/gt_irq.c -
		common IRQ routines for GT-64120 chip.  Currently it only handles
	 	the timer interrupt.

. Board-specific routines are supplied under arch/mips/gt64120/<board> dir.
	1) arch/mips/gt64120/<board>/pci.c - it provides bus fixup routine
	2) arch/mips/gt64120/<board>/irq.c - it provides enable/disable irqs
		and board irq setup routine (irq_setup)
	3) arch/mips/gt64120/<board>/int-handler.S -
		The first-level interrupt dispatching routine.
	4) a bunch of other "normal" stuff (setup, prom, dbg_io, reset, etc)

. Follow other "normal" procedure to modify configuration files, etc.


TO-DO LIST
----------

. Expand arch/mips/gt64120/gt_irq.c to handle all GT-64120 interrupts.
  We probably need to introduce GT_IRQ_BASE  in board-dep header file,
  which is used the starting irq_nr for all GT irqs.

  A function, gt64120_handle_irq(), will be added so that the first-level
  irq dispatcher will call this function if it detects an interrupt
  from GT-64120.

. More support for GT-64120 PCI features (2nd PCI bus, perhaps)
+107 −74
Original line number Diff line number Diff line
@@ -37,16 +37,6 @@ config BASLER_EXCITE
	  The eXcite is a smart camera platform manufactured by
	  Basler Vision Technologies AG.

config BASLER_EXCITE_PROTOTYPE
	bool "Support for pre-release units"
	depends on BASLER_EXCITE
	default n
	help
	  Pre-series (prototype) units are different from later ones in
	  some ways. Select this option if you have one of these. Please
	  note that a kernel built with this option selected will not be
	  able to run on normal units.

config BCM47XX
	bool "BCM47XX based boards"
	select CEVT_R4K
@@ -82,7 +72,7 @@ config MIPS_COBALT
	select SYS_HAS_CPU_NEVADA
	select SYS_HAS_EARLY_PRINTK
	select SYS_SUPPORTS_32BIT_KERNEL
	select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
	select SYS_SUPPORTS_64BIT_KERNEL
	select SYS_SUPPORTS_LITTLE_ENDIAN
	select GENERIC_HARDIRQS_NO__DO_IRQ

@@ -91,6 +81,9 @@ config MACH_DECSTATION
	select BOOT_ELF32
	select CEVT_R4K
	select CSRC_R4K
	select CPU_DADDI_WORKAROUNDS if 64BIT
	select CPU_R4000_WORKAROUNDS if 64BIT
	select CPU_R4400_WORKAROUNDS if 64BIT
	select DMA_NONCOHERENT
	select NO_IOPORT
	select IRQ_CPU
@@ -124,12 +117,12 @@ config MACH_JAZZ
	select ARCH_MAY_HAVE_PC_FDC
	select CEVT_R4K
	select CSRC_R4K
	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
	select GENERIC_ISA_DMA
	select IRQ_CPU
	select I8253
	select I8259
	select ISA
	select PCSPEAKER
	select SYS_HAS_CPU_R4X00
	select SYS_SUPPORTS_32BIT_KERNEL
	select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
@@ -187,6 +180,7 @@ config LEMOTE_FULONG
config MIPS_ATLAS
	bool "MIPS Atlas board"
	select BOOT_ELF32
	select BOOT_RAW
	select CEVT_R4K
	select CSRC_R4K
	select DMA_NONCOHERENT
@@ -219,6 +213,7 @@ config MIPS_MALTA
	bool "MIPS Malta board"
	select ARCH_MAY_HAVE_PC_FDC
	select BOOT_ELF32
	select BOOT_RAW
	select CEVT_R4K
	select CSRC_R4K
	select DMA_NONCOHERENT
@@ -364,35 +359,6 @@ config PMC_YOSEMITE
	  Yosemite is an evaluation board for the RM9000x2 processor
	  manufactured by PMC-Sierra.

config QEMU
	bool "Qemu"
	select CEVT_R4K
	select CSRC_R4K
	select DMA_COHERENT
	select GENERIC_ISA_DMA
	select HAVE_STD_PC_SERIAL_PORT
	select I8253
	select I8259
	select IRQ_CPU
	select ISA
	select PCSPEAKER
	select SWAP_IO_SPACE
	select SYS_HAS_CPU_MIPS32_R1
	select SYS_HAS_EARLY_PRINTK
	select SYS_SUPPORTS_32BIT_KERNEL
	select SYS_SUPPORTS_BIG_ENDIAN
	select SYS_SUPPORTS_LITTLE_ENDIAN
	select GENERIC_HARDIRQS_NO__DO_IRQ
	select NR_CPUS_DEFAULT_1
	select SYS_SUPPORTS_SMP
	help
	  Qemu is a software emulator which among other architectures also
	  can simulate a MIPS32 4Kc system.  This patch adds support for the
	  system architecture that currently is being simulated by Qemu.  It
	  will eventually be removed again when Qemu has the capability to
	  simulate actual MIPS hardware platforms.  More information on Qemu
	  can be found at http://www.linux-mips.org/wiki/Qemu.

config SGI_IP22
	bool "SGI IP22 (Indy/Indigo2)"
	select ARC
@@ -400,6 +366,7 @@ config SGI_IP22
	select BOOT_ELF32
	select CEVT_R4K
	select CSRC_R4K
	select DEFAULT_SGI_PARTITION
	select DMA_NONCOHERENT
	select HW_HAS_EISA
	select I8253
@@ -407,6 +374,12 @@ config SGI_IP22
	select IP22_CPU_SCACHE
	select IRQ_CPU
	select GENERIC_ISA_DMA_SUPPORT_BROKEN
	select SGI_HAS_DS1286
	select SGI_HAS_I8042
	select SGI_HAS_INDYDOG
	select SGI_HAS_SEEQ
	select SGI_HAS_WD93
	select SGI_HAS_ZILOG
	select SWAP_IO_SPACE
	select SYS_HAS_CPU_R4X00
	select SYS_HAS_CPU_R5000
@@ -424,6 +397,7 @@ config SGI_IP27
	select ARC
	select ARC64
	select BOOT_ELF64
	select DEFAULT_SGI_PARTITION
	select DMA_IP27
	select SYS_HAS_EARLY_PRINTK
	select HW_HAS_PCI
@@ -440,6 +414,36 @@ config SGI_IP27
	  workstations.  To compile a Linux kernel that runs on these, say Y
	  here.

config SGI_IP28
	bool "SGI IP28 (Indigo2 R10k) (EXPERIMENTAL)"
	depends on EXPERIMENTAL
	select ARC
	select ARC64
	select BOOT_ELF64
	select CEVT_R4K
	select CSRC_R4K
	select DEFAULT_SGI_PARTITION
	select DMA_NONCOHERENT
	select GENERIC_ISA_DMA_SUPPORT_BROKEN
	select IRQ_CPU
	select HW_HAS_EISA
	select I8253
	select I8259
	select SGI_HAS_DS1286
	select SGI_HAS_I8042
	select SGI_HAS_INDYDOG
	select SGI_HAS_SEEQ
	select SGI_HAS_WD93
	select SGI_HAS_ZILOG
	select SWAP_IO_SPACE
	select SYS_HAS_CPU_R10000
	select SYS_HAS_EARLY_PRINTK
	select SYS_SUPPORTS_64BIT_KERNEL
	select SYS_SUPPORTS_BIG_ENDIAN
      help
        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
        kernel that runs on these, say Y here.

config SGI_IP32
	bool "SGI IP32 (O2)"
	select ARC
@@ -545,19 +549,6 @@ config SIBYTE_SENTOSA
	select SYS_SUPPORTS_BIG_ENDIAN
	select SYS_SUPPORTS_LITTLE_ENDIAN

config SIBYTE_PTSWARM
	bool "Sibyte BCM91250PT-PTSWARM"
	depends on EXPERIMENTAL
	select BOOT_ELF32
	select DMA_COHERENT
	select NR_CPUS_DEFAULT_2
	select SIBYTE_SB1250
	select SWAP_IO_SPACE
	select SYS_HAS_CPU_SB1
	select SYS_SUPPORTS_BIG_ENDIAN
	select SYS_SUPPORTS_HIGHMEM
	select SYS_SUPPORTS_LITTLE_ENDIAN

config SIBYTE_BIGSUR
	bool "Sibyte BCM91480B-BigSur"
	select BOOT_ELF32
@@ -575,10 +566,12 @@ config SNI_RM
	bool "SNI RM200/300/400"
	select ARC if CPU_LITTLE_ENDIAN
	select ARC32 if CPU_LITTLE_ENDIAN
	select SNIPROM if CPU_BIG_ENDIAN
	select ARCH_MAY_HAVE_PC_FDC
	select BOOT_ELF32
	select CEVT_R4K
	select CSRC_R4K
	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
	select DMA_NONCOHERENT
	select GENERIC_ISA_DMA
	select HW_HAS_EISA
@@ -587,7 +580,6 @@ config SNI_RM
	select I8253
	select I8259
	select ISA
	select PCSPEAKER
	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
	select SYS_HAS_CPU_R4X00
	select SYS_HAS_CPU_R5000
@@ -690,6 +682,7 @@ config WR_PPMC
endchoice

source "arch/mips/au1000/Kconfig"
source "arch/mips/basler/excite/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
@@ -797,10 +790,6 @@ config DMA_COHERENT
config DMA_IP27
	bool

config DMA_IP32
	bool
	select DMA_NEED_PCI_MAP_STATE

config DMA_NONCOHERENT
	bool
	select DMA_NEED_PCI_MAP_STATE
@@ -956,16 +945,40 @@ config EMMA2RH
config SERIAL_RM9000
	bool

config SGI_HAS_DS1286
	bool

config SGI_HAS_INDYDOG
	bool

config SGI_HAS_SEEQ
	bool

config SGI_HAS_WD93
	bool

config SGI_HAS_ZILOG
	bool

config SGI_HAS_I8042
	bool

config DEFAULT_SGI_PARTITION
	bool

config ARC32
	bool

config SNIPROM
	bool

config BOOT_ELF32
	bool

config MIPS_L1_CACHE_SHIFT
	int
	default "4" if MACH_DECSTATION
	default "7" if SGI_IP27 || SNI_RM
	default "7" if SGI_IP27 || SGI_IP28 || SNI_RM
	default "4" if PMC_MSP4200_EVAL
	default "5"

@@ -974,7 +987,7 @@ config HAVE_STD_PC_SERIAL_PORT

config ARC_CONSOLE
	bool "ARC console support"
	depends on SGI_IP22 || (SNI_RM && CPU_LITTLE_ENDIAN)
	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)

config ARC_MEMORY
	bool
@@ -983,7 +996,7 @@ config ARC_MEMORY

config ARC_PROMLIB
	bool
	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP32
	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
	default y

config ARC64
@@ -1443,7 +1456,9 @@ config MIPS_MT_SMP
	select MIPS_MT
	select NR_CPUS_DEFAULT_2
	select SMP
	select SYS_SUPPORTS_SCHED_SMT if SMP
	select SYS_SUPPORTS_SMP
	select SMP_UP
	help
	  This is a kernel model which is also known a VSMP or lately
	  has been marketesed into SMVP.
@@ -1460,6 +1475,7 @@ config MIPS_MT_SMTC
	select NR_CPUS_DEFAULT_8
	select SMP
	select SYS_SUPPORTS_SMP
	select SMP_UP
	help
	  This is a kernel model which is known a SMTC or lately has been
	  marketesed into SMVP.
@@ -1469,6 +1485,19 @@ endchoice
config MIPS_MT
	bool

config SCHED_SMT
	bool "SMT (multithreading) scheduler support"
	depends on SYS_SUPPORTS_SCHED_SMT
	default n
	help
	  SMT scheduler support improves the CPU scheduler's decision making
	  when dealing with MIPS MT enabled cores at a cost of slightly
	  increased overhead in some places. If unsure say N here.

config SYS_SUPPORTS_SCHED_SMT
	bool


config SYS_SUPPORTS_MULTITHREADING
	bool

@@ -1589,15 +1618,6 @@ config CPU_HAS_SMARTMIPS
config CPU_HAS_WB
	bool

config 64BIT_CONTEXT
	bool "Save 64bit integer registers"
	depends on 32BIT && CPU_LOONGSON2
	help
	  Loongson2 CPU is 64bit , when used in 32BIT mode, its integer
	  registers can still be accessed as 64bit, mainly for multimedia
	  instructions. We must have all 64bit save/restored to make sure
	  those instructions to get correct result.

#
# Vectored interrupt mode is an R2 feature
#
@@ -1618,6 +1638,19 @@ config CPU_HAS_SYNC
config GENERIC_CLOCKEVENTS_BROADCAST
	bool

#
# CPU non-features
#
config CPU_DADDI_WORKAROUNDS
	bool

config CPU_R4000_WORKAROUNDS
	bool
	select CPU_R4400_WORKAROUNDS

config CPU_R4400_WORKAROUNDS
	bool

#
# Use the generic interrupt handling code in kernel/irq/:
#
@@ -1721,6 +1754,9 @@ config SMP

	  If you don't know what to do here, say N.

config SMP_UP
	bool

config SYS_SUPPORTS_SMP
	bool

@@ -1978,9 +2014,6 @@ config MMU
config I8253
	bool

config PCSPEAKER
	bool

config ZONE_DMA32
	bool

+27 −13
Original line number Diff line number Diff line
@@ -141,6 +141,10 @@ cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap
cflags-$(CONFIG_CPU_R10000)	+= $(call cc-option,-march=r10000,-march=r8000) \
			-Wa,--trap

cflags-$(CONFIG_CPU_R4000_WORKAROUNDS)	+= $(call cc-option,-mfix-r4000,)
cflags-$(CONFIG_CPU_R4400_WORKAROUNDS)	+= $(call cc-option,-mfix-r4400,)
cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS)	+= $(call cc-option,-mno-daddi,)

ifdef CONFIG_CPU_SB1
ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
MODFLAGS	+= -msb1-pass1-workarounds
@@ -152,6 +156,8 @@ endif
#
libs-$(CONFIG_ARC)		+= arch/mips/fw/arc/
libs-$(CONFIG_CFE)		+= arch/mips/fw/cfe/
libs-$(CONFIG_SNIPROM)		+= arch/mips/fw/sni/
libs-y				+= arch/mips/fw/lib/
libs-$(CONFIG_SIBYTE_CFE)	+= arch/mips/sibyte/cfe/

#
@@ -308,7 +314,7 @@ core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
cflags-$(CONFIG_MIPS_ATLAS)	+= -Iinclude/asm-mips/mach-atlas
cflags-$(CONFIG_MIPS_ATLAS)	+= -Iinclude/asm-mips/mach-mips
load-$(CONFIG_MIPS_ATLAS)	+= 0xffffffff80100000
all-$(CONFIG_MIPS_ATLAS)	:= vmlinux.srec
all-$(CONFIG_MIPS_ATLAS)	:= vmlinux.bin

#
# MIPS Malta board
@@ -316,7 +322,7 @@ all-$(CONFIG_MIPS_ATLAS) := vmlinux.srec
core-$(CONFIG_MIPS_MALTA)	+= arch/mips/mips-boards/malta/
cflags-$(CONFIG_MIPS_MALTA)	+= -Iinclude/asm-mips/mach-mips
load-$(CONFIG_MIPS_MALTA)	+= 0xffffffff80100000
all-$(CONFIG_MIPS_MALTA)	:= vmlinux.srec
all-$(CONFIG_MIPS_MALTA)	:= vmlinux.bin

#
# MIPS SEAD board
@@ -348,14 +354,6 @@ core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
cflags-$(CONFIG_PMC_YOSEMITE)	+= -Iinclude/asm-mips/mach-yosemite
load-$(CONFIG_PMC_YOSEMITE)	+= 0xffffffff80100000

#
# Qemu simulating MIPS32 4Kc
#
core-$(CONFIG_QEMU)		+= arch/mips/qemu/
cflags-$(CONFIG_QEMU)		+= -Iinclude/asm-mips/mach-qemu
load-$(CONFIG_QEMU)		+= 0xffffffff80010000
all-$(CONFIG_QEMU)		:= vmlinux.bin

#
# Basler eXcite
#
@@ -474,6 +472,20 @@ OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
endif
endif

#
# SGI IP28 (Indigo2 R10k)
#
# Set the load address to >= 0xa800000020080000 if you want to leave space for
# symmon, 0xa800000020004000 for production kernels ?  Note that the value must
# be 16kb aligned or the handling of the current variable will break.
# Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys
#
#core-$(CONFIG_SGI_IP28)		+= arch/mips/sgi-ip22/ arch/mips/arc/arc_con.o
core-$(CONFIG_SGI_IP28)		+= arch/mips/sgi-ip22/
cflags-$(CONFIG_SGI_IP28)	+= -mr10k-cache-barrier=1 -Iinclude/asm-mips/mach-ip28
#cflags-$(CONFIG_SGI_IP28)	+= -Iinclude/asm-mips/mach-ip28
load-$(CONFIG_SGI_IP28)		+= 0xa800000020004000

#
# SGI-IP32 (O2)
#
@@ -602,9 +614,11 @@ ifdef CONFIG_64BIT
    endif
  endif

  ifeq ($(KBUILD_SYM32), y)
    ifeq ($(call cc-option-yn,-msym32), y)
  ifeq ($(KBUILD_SYM32)$(call cc-option-yn,-msym32), yy)
    cflags-y += -msym32 -DKBUILD_64BIT_SYM32
  else
    ifeq ($(CONFIG_CPU_DADDI_WORKAROUNDS), y)
      $(error CONFIG_CPU_DADDI_WORKAROUNDS unsupported without -msym32)
    endif
  endif
endif
+2 −19
Original line number Diff line number Diff line
@@ -25,27 +25,10 @@
 *  with this program; if not, write  to the Free Software Foundation, Inc.,
 *  675 Mass Ave, Cambridge, MA 02139, USA.
 */
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/delay.h>
#include <linux/bitops.h>
#include <linux/kernel.h>

#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/mach-au1x00/au1000.h>
#include <au1000.h>

/* The IC0 interrupt table.  This is processor, rather than
 * board dependent, so no reason to keep this info in the board
Loading