Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2197ec02 authored by Arun Kumar Neelakantam's avatar Arun Kumar Neelakantam
Browse files

ARM: dts: msm: Add SMP2P devices for msmgold 



Add interprocessor, point-to-point signaling devices for Modem,
LPASS and WCNSS.

Change-Id: I93dc2a5885348fefc4b7e67783745c5f55e2cb4f
Signed-off-by: default avatarArun Kumar Neelakantam <aneela@codeaurora.org>
parent 3204cbe7

arch/arm/boot/dts/qcom/msmgold-smp2p.dtsi

0 → 100644
+163 −0
Original line number Diff line number Diff line 
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include <dt-bindings/interrupt-controller/arm-gic.h>



&soc {

	qcom,smp2p-modem@0xb011008 {

		compatible = "qcom,smp2p";

		reg = <0xb011008 0x4>;

		qcom,remote-pid = <1>;

		qcom,irq-bitmask = <0x4000>;

		interrupts = <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>;

	};



	qcom,smp2p-wcnss@0xb011008 {

		compatible = "qcom,smp2p";

		reg = <0xb011008 0x4>;

		qcom,remote-pid = <4>;

		qcom,irq-bitmask = <0x40000>;

		interrupts = <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>;

	};



	qcom,smp2p-adsp@0xb011008 {

		compatible = "qcom,smp2p";

		reg = <0xb011008 0x4>;

		qcom,remote-pid = <2>;

		qcom,irq-bitmask = <0x400>;

		interrupts = <GIC_SPI 291 IRQ_TYPE_EDGE_RISING>;

	};



	smp2pgpio_smp2p_15_in: qcom,smp2pgpio-smp2p-15-in {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "smp2p";

		qcom,remote-pid = <15>;

		qcom,is-inbound;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};



	qcom,smp2pgpio_test_smp2p_15_in {

		compatible = "qcom,smp2pgpio_test_smp2p_15_in";

		gpios = <&smp2pgpio_smp2p_15_in 0 0>;

	};



	smp2pgpio_smp2p_15_out: qcom,smp2pgpio-smp2p-15-out {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "smp2p";

		qcom,remote-pid = <15>;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};



	qcom,smp2pgpio_test_smp2p_15_out {

		compatible = "qcom,smp2pgpio_test_smp2p_15_out";

		gpios = <&smp2pgpio_smp2p_15_out 0 0>;

	};



	smp2pgpio_smp2p_1_in: qcom,smp2pgpio-smp2p-1-in {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "smp2p";

		qcom,remote-pid = <1>;

		qcom,is-inbound;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};



	qcom,smp2pgpio_test_smp2p_1_in {

		compatible = "qcom,smp2pgpio_test_smp2p_1_in";

		gpios = <&smp2pgpio_smp2p_1_in 0 0>;

	};



	smp2pgpio_smp2p_1_out: qcom,smp2pgpio-smp2p-1-out {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "smp2p";

		qcom,remote-pid = <1>;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};



	qcom,smp2pgpio_test_smp2p_1_out {

		compatible = "qcom,smp2pgpio_test_smp2p_1_out";

		gpios = <&smp2pgpio_smp2p_1_out 0 0>;

	};



	smp2pgpio_smp2p_4_in: qcom,smp2pgpio-smp2p-4-in {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "smp2p";

		qcom,remote-pid = <4>;

		qcom,is-inbound;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};



	qcom,smp2pgpio_test_smp2p_4_in {

		compatible = "qcom,smp2pgpio_test_smp2p_4_in";

		gpios = <&smp2pgpio_smp2p_4_in 0 0>;

	};



	smp2pgpio_smp2p_4_out: qcom,smp2pgpio-smp2p-4-out {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "smp2p";

		qcom,remote-pid = <4>;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};



	qcom,smp2pgpio_test_smp2p_4_out {

		compatible = "qcom,smp2pgpio_test_smp2p_4_out";

		gpios = <&smp2pgpio_smp2p_4_out 0 0>;

	};



	smp2pgpio_smp2p_2_in: qcom,smp2pgpio-smp2p-2-in {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "smp2p";

		qcom,remote-pid = <2>;

		qcom,is-inbound;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};



	qcom,smp2pgpio_test_smp2p_2_in {

		compatible = "qcom,smp2pgpio_test_smp2p_2_in";

		gpios = <&smp2pgpio_smp2p_2_in 0 0>;

	};



	smp2pgpio_smp2p_2_out: qcom,smp2pgpio-smp2p-2-out {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "smp2p";

		qcom,remote-pid = <2>;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};



	qcom,smp2pgpio_test_smp2p_2_out {

		compatible = "qcom,smp2pgpio_test_smp2p_2_out";

		gpios = <&smp2pgpio_smp2p_2_out 0 0>;

	};

};

arch/arm/boot/dts/qcom/msmgold.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -91,6 +91,7 @@ 
#include "msmgold-ion.dtsi"

#include "msmgold-iommu.dtsi"

#include "msmgold-iommu-domains.dtsi"

#include "msmgold-smp2p.dtsi"



&soc {

	#address-cells = <1>;