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Commit 210561ff authored by Daniel Vetter's avatar Daniel Vetter
Browse files

intel/iommu: force writebuffer-flush quirk on Gen 4 Chipsets 

We already have the quirk entry for the mobile platform, but also
reports on some desktop versions. So be paranoid and set it
everywhere.

References: http://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg33138.html


Cc: stable@vger.kernel.org
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: "Sankaran, Rajesh" <rajesh.sankaran@intel.com>
Reported-and-tested-by: default avatarMihai Moldovan <ionic@ionic.de>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent da88a5f7

drivers/iommu/intel-iommu.c

+7 −1
Original line number Diff line number Diff line
@@ -4253,13 +4253,19 @@ static void quirk_iommu_rwbf(struct pci_dev *dev) 
{

	/*

	 * Mobile 4 Series Chipset neglects to set RWBF capability,

	 * but needs it:

	 * but needs it. Same seems to hold for the desktop versions.

	 */

	printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n");

	rwbf_quirk = 1;

}



DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_rwbf);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_rwbf);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_rwbf);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_rwbf);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_rwbf);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_rwbf);



#define GGC 0x52

#define GGC_MEMORY_SIZE_MASK	(0xf << 8)