Loading drivers/devfreq/governor_msm_adreno_tz.c +7 −2 Original line number Diff line number Diff line /* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2010-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -520,7 +520,12 @@ static int tz_handler(struct devfreq *devfreq, unsigned int event, void *data) static void _do_partner_event(struct work_struct *work, unsigned int event) { struct devfreq *bus_devfreq = partner_gpu_profile->bus_devfreq; struct devfreq *bus_devfreq; if (partner_gpu_profile == NULL) return; bus_devfreq = partner_gpu_profile->bus_devfreq; if (bus_devfreq != NULL && bus_devfreq->governor && Loading drivers/gpu/msm/adreno.c +98 −87 Original line number Diff line number Diff line Loading @@ -57,7 +57,7 @@ MODULE_PARM_DESC(nopreempt, "Disable GPU preemption"); #define KGSL_LOG_LEVEL_DEFAULT 3 static void adreno_input_work(struct work_struct *work); static unsigned int counter_delta(struct adreno_device *adreno_dev, static unsigned int counter_delta(struct kgsl_device *device, unsigned int reg, unsigned int *counter); static struct devfreq_msm_adreno_tz_data adreno_tz_data = { Loading Loading @@ -138,7 +138,7 @@ void adreno_readreg64(struct adreno_device *adreno_dev, { struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); unsigned int val_lo = 0, val_hi = 0; struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); if (adreno_checkreg_off(adreno_dev, lo)) kgsl_regread(device, gpudev->reg_offsets->offsets[lo], &val_lo); Loading @@ -160,14 +160,13 @@ void adreno_writereg64(struct adreno_device *adreno_dev, enum adreno_regs lo, enum adreno_regs hi, uint64_t val) { struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); struct kgsl_device *device = &adreno_dev->dev; if (adreno_checkreg_off(adreno_dev, lo)) kgsl_regwrite(device, gpudev->reg_offsets->offsets[lo], lower_32_bits(val)); kgsl_regwrite(KGSL_DEVICE(adreno_dev), gpudev->reg_offsets->offsets[lo], lower_32_bits(val)); if (adreno_checkreg_off(adreno_dev, hi)) kgsl_regwrite(device, gpudev->reg_offsets->offsets[hi], upper_32_bits(val)); kgsl_regwrite(KGSL_DEVICE(adreno_dev), gpudev->reg_offsets->offsets[hi], upper_32_bits(val)); } /** Loading @@ -190,7 +189,7 @@ static size_t efuse_len; int adreno_efuse_map(struct adreno_device *adreno_dev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct resource *res; if (efuse_base != NULL) Loading Loading @@ -395,19 +394,6 @@ static struct platform_driver kgsl_iommu_platform_driver = { } }; static int __init kgsl_iommu_pdev_init(void) { return platform_driver_register(&kgsl_iommu_platform_driver); } static void __exit kgsl_iommu_pdev_exit(void) { platform_driver_unregister(&kgsl_iommu_platform_driver); } module_init(kgsl_iommu_pdev_init); module_exit(kgsl_iommu_pdev_exit); static int _get_counter(struct adreno_device *adreno_dev, int group, int countable, unsigned int *lo, unsigned int *hi) Loading @@ -420,12 +406,10 @@ static int _get_counter(struct adreno_device *adreno_dev, lo, hi, PERFCOUNTER_FLAG_KERNEL); if (ret) { struct kgsl_device *device = &adreno_dev->dev; KGSL_DRV_ERR(device, KGSL_DRV_ERR(KGSL_DEVICE(adreno_dev), "Unable to allocate fault detect performance counter %d/%d\n", group, countable); KGSL_DRV_ERR(device, KGSL_DRV_ERR(KGSL_DEVICE(adreno_dev), "GPU fault detect will be less reliable\n"); } } Loading Loading @@ -514,7 +498,7 @@ static void adreno_input_work(struct work_struct *work) { struct adreno_device *adreno_dev = container_of(work, struct adreno_device, input_work); struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); mutex_lock(&device->mutex); Loading Loading @@ -708,14 +692,12 @@ void adreno_irqctrl(struct adreno_device *adreno_dev, int state) */ void adreno_hang_int_callback(struct adreno_device *adreno_dev, int bit) { struct kgsl_device *device = &adreno_dev->dev; KGSL_DRV_CRIT(device, "MISC: GPU hang detected\n"); KGSL_DRV_CRIT(KGSL_DEVICE(adreno_dev), "MISC: GPU hang detected\n"); adreno_irqctrl(adreno_dev, 0); /* Trigger a fault in the dispatcher - this will effect a restart */ adreno_set_gpu_fault(ADRENO_DEVICE(device), ADRENO_HARD_FAULT); adreno_dispatcher_schedule(device); adreno_set_gpu_fault(adreno_dev, ADRENO_HARD_FAULT); adreno_dispatcher_schedule(KGSL_DEVICE(adreno_dev)); } /* Loading @@ -727,7 +709,7 @@ void adreno_hang_int_callback(struct adreno_device *adreno_dev, int bit) */ void adreno_cp_callback(struct adreno_device *adreno_dev, int bit) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); kgsl_schedule_work(&device->event_work); adreno_dispatcher_schedule(device); Loading Loading @@ -800,16 +782,16 @@ adreno_identify_gpu(struct adreno_device *adreno_dev) struct adreno_gpudev *gpudev; int i; if (kgsl_property_read_u32(&adreno_dev->dev, "qcom,chipid", if (kgsl_property_read_u32(KGSL_DEVICE(adreno_dev), "qcom,chipid", &adreno_dev->chipid)) KGSL_DRV_FATAL(&adreno_dev->dev, KGSL_DRV_FATAL(KGSL_DEVICE(adreno_dev), "No GPU chip ID was specified\n"); adreno_dev->gpucore = _get_gpu_core(adreno_dev->chipid); if (adreno_dev->gpucore == NULL) KGSL_DRV_FATAL(&adreno_dev->dev, "Unknown GPU chip ID %8.8X\n", adreno_dev->chipid); KGSL_DRV_FATAL(KGSL_DEVICE(adreno_dev), "Unknown GPU chip ID %8.8X\n", adreno_dev->chipid); /* * The gmem size might be dynamic when ocmem is involved so copy it out Loading Loading @@ -851,7 +833,7 @@ static const struct of_device_id adreno_match_table[] = { static int adreno_of_parse_pwrlevels(struct adreno_device *adreno_dev, struct device_node *node) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct kgsl_pwrctrl *pwr = &device->pwrctrl; struct device_node *child; Loading Loading @@ -951,7 +933,7 @@ static struct { static int adreno_of_get_power(struct adreno_device *adreno_dev, struct platform_device *pdev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct kgsl_pwrctrl *pwr = &device->pwrctrl; struct device_node *node = pdev->dev.of_node; int i, init_level; Loading Loading @@ -1067,7 +1049,7 @@ static int adreno_probe(struct platform_device *pdev) return -ENODEV; } device = &adreno_dev->dev; device = KGSL_DEVICE(adreno_dev); device->pdev = pdev; device->mmu.priv = &device_3d0_iommu; Loading Loading @@ -1116,7 +1098,7 @@ static int adreno_probe(struct platform_device *pdev) adreno_debugfs_init(adreno_dev); adreno_profile_init(adreno_dev); adreno_sysfs_init(device); adreno_sysfs_init(adreno_dev); kgsl_pwrscale_init(&pdev->dev, CONFIG_MSM_ADRENO_DEFAULT_GOVERNOR); Loading Loading @@ -1145,7 +1127,8 @@ out: static void _adreno_free_memories(struct adreno_device *adreno_dev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); if (test_bit(ADRENO_DEVICE_CMDBATCH_PROFILE, &adreno_dev->priv)) kgsl_free_global(device, &adreno_dev->cmdbatch_profile_buffer); Loading @@ -1171,7 +1154,7 @@ static int adreno_remove(struct platform_device *pdev) if (adreno_dev == NULL) return 0; device = &adreno_dev->dev; device = KGSL_DEVICE(adreno_dev); /* The memory is fading */ _adreno_free_memories(adreno_dev); Loading @@ -1179,7 +1162,7 @@ static int adreno_remove(struct platform_device *pdev) #ifdef CONFIG_INPUT input_unregister_handler(&adreno_input_handler); #endif adreno_sysfs_close(device); adreno_sysfs_close(adreno_dev); adreno_coresight_remove(adreno_dev); adreno_profile_close(adreno_dev); Loading Loading @@ -1334,7 +1317,7 @@ static int adreno_init(struct kgsl_device *device) */ if (!adreno_is_a3xx(adreno_dev)) { int r = kgsl_allocate_global(&adreno_dev->dev, int r = kgsl_allocate_global(device, &adreno_dev->cmdbatch_profile_buffer, PAGE_SIZE, 0, 0); adreno_dev->cmdbatch_profile_index = 0; Loading @@ -1342,7 +1325,7 @@ static int adreno_init(struct kgsl_device *device) if (r == 0) { set_bit(ADRENO_DEVICE_CMDBATCH_PROFILE, &adreno_dev->priv); kgsl_sharedmem_set(&adreno_dev->dev, kgsl_sharedmem_set(device, &adreno_dev->cmdbatch_profile_buffer, 0, 0, PAGE_SIZE); } Loading Loading @@ -1435,7 +1418,7 @@ static uint64_t _read_throttling_counters(struct adreno_device *adreno_dev) if (!adreno_dev->gpmu_throttle_counters[i]) return 0; th[i] = counter_delta(adreno_dev, th[i] = counter_delta(KGSL_DEVICE(adreno_dev), adreno_dev->gpmu_throttle_counters[i], &busy->throttle_cycles[i]); } Loading @@ -1448,7 +1431,8 @@ static void _update_threshold_count(struct adreno_device *adreno_dev, uint64_t adj) { if (adreno_is_a530(adreno_dev)) kgsl_regread(&adreno_dev->dev, adreno_dev->lm_threshold_count, kgsl_regread(KGSL_DEVICE(adreno_dev), adreno_dev->lm_threshold_count, &adreno_dev->lm_threshold_cross); else if (adreno_is_a540(adreno_dev)) adreno_dev->lm_threshold_cross = adj; Loading @@ -1463,7 +1447,7 @@ static void _update_threshold_count(struct adreno_device *adreno_dev, */ static int _adreno_start(struct adreno_device *adreno_dev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); int status = -EINVAL, ret; unsigned int state = device->state; Loading Loading @@ -2096,9 +2080,9 @@ static int adreno_setproperty(struct kgsl_device_private *dev_priv, if (enable) { device->pwrctrl.ctrl_flags = 0; if (!kgsl_active_count_get(&adreno_dev->dev)) { if (!kgsl_active_count_get(device)) { adreno_fault_detect_start(adreno_dev); kgsl_active_count_put(&adreno_dev->dev); kgsl_active_count_put(device); } kgsl_pwrscale_enable(device); Loading Loading @@ -2306,17 +2290,16 @@ bool adreno_isidle(struct kgsl_device *device) /** * adreno_spin_idle() - Spin wait for the GPU to idle * @device: Pointer to the KGSL device * @adreno_dev: Pointer to an adreno device * @timeout: milliseconds to wait before returning error * * Spin the CPU waiting for the RBBM status to return idle */ int adreno_spin_idle(struct kgsl_device *device, unsigned int timeout) int adreno_spin_idle(struct adreno_device *adreno_dev, unsigned int timeout) { struct adreno_device *adreno_dev = ADRENO_DEVICE(device); unsigned long wait = jiffies + msecs_to_jiffies(timeout); kgsl_cffdump_regpoll(device, kgsl_cffdump_regpoll(KGSL_DEVICE(adreno_dev), adreno_getreg(adreno_dev, ADRENO_REG_RBBM_STATUS) << 2, 0x00000000, 0x80000000); Loading @@ -2331,7 +2314,7 @@ int adreno_spin_idle(struct kgsl_device *device, unsigned int timeout) if (adreno_gpu_fault(adreno_dev) != 0) return -EDEADLK; if (adreno_isidle(device)) if (adreno_isidle(KGSL_DEVICE(adreno_dev))) return 0; } Loading Loading @@ -2368,7 +2351,7 @@ int adreno_idle(struct kgsl_device *device) if (ret) return ret; return adreno_spin_idle(device, ADRENO_IDLE_TIMEOUT); return adreno_spin_idle(adreno_dev, ADRENO_IDLE_TIMEOUT); } /** Loading Loading @@ -2531,14 +2514,15 @@ static int adreno_waittimestamp(struct kgsl_device *device, /** * __adreno_readtimestamp() - Reads the timestamp from memstore memory * @device: Pointer to device whose memstore is read * @adreno_dev: Pointer to an adreno device * @index: Index into the memstore memory * @type: Type of timestamp to read * @timestamp: The out parameter where the timestamp is read */ static int __adreno_readtimestamp(struct kgsl_device *device, int index, static int __adreno_readtimestamp(struct adreno_device *adreno_dev, int index, int type, unsigned int *timestamp) { struct kgsl_device *device = KGSL_DEVICE(adreno_dev); int status = 0; switch (type) { Loading @@ -2561,7 +2545,7 @@ static int __adreno_readtimestamp(struct kgsl_device *device, int index, /** * adreno_rb_readtimestamp(): Return the value of given type of timestamp * for a RB * @device: GPU device whose timestamp values are being queried * @adreno_dev: adreno device whose timestamp values are being queried * @priv: The object being queried for a timestamp (expected to be a rb pointer) * @type: The type of timestamp (one of 3) to be read * @timestamp: Pointer to where the read timestamp is to be written to Loading @@ -2573,7 +2557,7 @@ static int __adreno_readtimestamp(struct kgsl_device *device, int index, * The function returns 0 on success and timestamp value at the *timestamp * address and returns -EINVAL on any read error/invalid type and timestamp = 0. */ int adreno_rb_readtimestamp(struct kgsl_device *device, int adreno_rb_readtimestamp(struct adreno_device *adreno_dev, void *priv, enum kgsl_timestamp_type type, unsigned int *timestamp) { Loading @@ -2590,7 +2574,7 @@ int adreno_rb_readtimestamp(struct kgsl_device *device, if (KGSL_TIMESTAMP_QUEUED == type) *timestamp = rb->timestamp; else status = __adreno_readtimestamp(device, status = __adreno_readtimestamp(adreno_dev, rb->id + KGSL_MEMSTORE_MAX, type, timestamp); Loading Loading @@ -2630,7 +2614,7 @@ static int adreno_readtimestamp(struct kgsl_device *device, if (KGSL_TIMESTAMP_QUEUED == type) *timestamp = adreno_context_timestamp(context); else status = __adreno_readtimestamp(device, status = __adreno_readtimestamp(ADRENO_DEVICE(device), context->id, type, timestamp); return status; Loading @@ -2642,10 +2626,9 @@ static inline s64 adreno_ticks_to_us(u32 ticks, u32 freq) return ticks / freq; } static unsigned int counter_delta(struct adreno_device *adreno_dev, static unsigned int counter_delta(struct kgsl_device *device, unsigned int reg, unsigned int *counter) { struct kgsl_device *device = &adreno_dev->dev; unsigned int val; unsigned int ret = 0; Loading Loading @@ -2685,7 +2668,7 @@ static void adreno_power_stats(struct kgsl_device *device, if (adreno_dev->perfctr_pwr_lo != 0) { uint64_t gpu_busy; gpu_busy = counter_delta(adreno_dev, adreno_dev->perfctr_pwr_lo, gpu_busy = counter_delta(device, adreno_dev->perfctr_pwr_lo, &busy->gpu_busy); adj = _read_throttling_counters(adreno_dev); Loading @@ -2698,12 +2681,12 @@ static void adreno_power_stats(struct kgsl_device *device, uint64_t ram_cycles = 0, starved_ram = 0; if (adreno_dev->ram_cycles_lo != 0) ram_cycles = counter_delta(adreno_dev, ram_cycles = counter_delta(device, adreno_dev->ram_cycles_lo, &busy->vbif_ram_cycles); if (adreno_dev->starved_ram_lo != 0) starved_ram = counter_delta(adreno_dev, starved_ram = counter_delta(device, adreno_dev->starved_ram_lo, &busy->vbif_starved_ram); Loading Loading @@ -2906,20 +2889,6 @@ static struct platform_driver adreno_platform_driver = { } }; static int __init kgsl_3d_init(void) { return platform_driver_register(&adreno_platform_driver); } static void __exit kgsl_3d_exit(void) { platform_driver_unregister(&adreno_platform_driver); } module_init(kgsl_3d_init); module_exit(kgsl_3d_exit); static struct of_device_id busmon_match_table[] = { { .compatible = "qcom,kgsl-busmon", .data = &device_3d0 }, {} Loading Loading @@ -2950,18 +2919,60 @@ static struct platform_driver kgsl_bus_platform_driver = { } }; static int __init kgsl_busmon_init(void) #if defined(CONFIG_ARM_SMMU) || defined(CONFIG_MSM_IOMMU) static int kgsl_iommu_driver_register(void) { return platform_driver_register(&kgsl_iommu_platform_driver); } static void kgsl_iommu_driver_unregister(void) { platform_driver_unregister(&kgsl_iommu_platform_driver); } #else static inline int kgsl_iommu_driver_register(void) { return 0; } static inline void kgsl_iommu_driver_unregister(void) { return platform_driver_register(&kgsl_bus_platform_driver); } #endif static int __init kgsl_3d_init(void) { int ret; ret = platform_driver_register(&kgsl_bus_platform_driver); if (ret) return ret; ret = kgsl_iommu_driver_register(); if (ret) { platform_driver_unregister(&kgsl_bus_platform_driver); return ret; } ret = platform_driver_register(&adreno_platform_driver); if (ret) { kgsl_iommu_driver_unregister(); platform_driver_unregister(&kgsl_bus_platform_driver); } static void __exit kgsl_busmon_exit(void) return ret; } static void __exit kgsl_3d_exit(void) { platform_driver_unregister(&adreno_platform_driver); kgsl_iommu_driver_unregister(); platform_driver_unregister(&kgsl_bus_platform_driver); } module_init(kgsl_busmon_init); module_exit(kgsl_busmon_exit); module_init(kgsl_3d_init); module_exit(kgsl_3d_exit); MODULE_DESCRIPTION("3D Graphics driver"); MODULE_VERSION("1.2"); Loading drivers/gpu/msm/adreno.h +14 −10 Original line number Diff line number Diff line Loading @@ -39,6 +39,9 @@ #define ADRENO_DEVICE(device) \ container_of(device, struct adreno_device, dev) /* KGSL_DEVICE - given an adreno_device, return the KGSL device struct */ #define KGSL_DEVICE(_dev) (&((_dev)->dev)) /* ADRENO_CONTEXT - Given a context return the adreno context struct */ #define ADRENO_CONTEXT(context) \ container_of(context, struct adreno_context, base) Loading Loading @@ -818,7 +821,7 @@ long adreno_ioctl_helper(struct kgsl_device_private *dev_priv, unsigned int cmd, unsigned long arg, const struct kgsl_ioctl *cmds, int len); int adreno_spin_idle(struct kgsl_device *device, unsigned int timeout); int adreno_spin_idle(struct adreno_device *device, unsigned int timeout); int adreno_idle(struct kgsl_device *device); bool adreno_isidle(struct kgsl_device *device); Loading @@ -836,7 +839,7 @@ void adreno_snapshot(struct kgsl_device *device, int adreno_reset(struct kgsl_device *device, int fault); void adreno_fault_skipcmd_detached(struct kgsl_device *device, void adreno_fault_skipcmd_detached(struct adreno_device *adreno_dev, struct adreno_context *drawctxt, struct kgsl_cmdbatch *cmdbatch); Loading Loading @@ -876,8 +879,8 @@ unsigned int adreno_iommu_set_pt_generate_cmds( unsigned int *cmds, struct kgsl_pagetable *pt); int adreno_sysfs_init(struct kgsl_device *device); void adreno_sysfs_close(struct kgsl_device *device); int adreno_sysfs_init(struct adreno_device *adreno_dev); void adreno_sysfs_close(struct adreno_device *adreno_dev); void adreno_irqctrl(struct adreno_device *adreno_dev, int state); Loading Loading @@ -1044,7 +1047,7 @@ static inline void adreno_readreg(struct adreno_device *adreno_dev, { struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); if (adreno_checkreg_off(adreno_dev, offset_name)) kgsl_regread(&adreno_dev->dev, kgsl_regread(KGSL_DEVICE(adreno_dev), gpudev->reg_offsets->offsets[offset_name], val); else *val = 0; Loading @@ -1062,7 +1065,7 @@ static inline void adreno_writereg(struct adreno_device *adreno_dev, { struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); if (adreno_checkreg_off(adreno_dev, offset_name)) kgsl_regwrite(&adreno_dev->dev, kgsl_regwrite(KGSL_DEVICE(adreno_dev), gpudev->reg_offsets->offsets[offset_name], val); } Loading Loading @@ -1185,7 +1188,7 @@ static inline void adreno_vbif_start(struct adreno_device *adreno_dev, } while ((vbif != NULL) && (vbif->reg != 0)) { kgsl_regwrite(&adreno_dev->dev, vbif->reg, vbif->val); kgsl_regwrite(KGSL_DEVICE(adreno_dev), vbif->reg, vbif->val); vbif++; } } Loading Loading @@ -1232,7 +1235,7 @@ static inline void adreno_set_protected_registers( val = 0x60000000 | ((mask_len & 0x1F) << 24) | ((reg << 2) & 0xFFFFF); kgsl_regwrite(&adreno_dev->dev, base + offset, val); kgsl_regwrite(KGSL_DEVICE(adreno_dev), base + offset, val); *index = *index + 1; } Loading Loading @@ -1314,7 +1317,7 @@ static inline unsigned int adreno_preempt_state( static inline unsigned int adreno_get_rptr(struct adreno_ringbuffer *rb) { struct adreno_device *adreno_dev = ADRENO_DEVICE(rb->device); struct adreno_device *adreno_dev = ADRENO_RB_DEVICE(rb); if (adreno_dev->cur_rb == rb && adreno_preempt_state(adreno_dev, ADRENO_DISPATCHER_PREEMPT_CLEAR)) Loading Loading @@ -1378,7 +1381,8 @@ static inline void adreno_set_active_ctxs_null(struct adreno_device *adreno_dev) if (rb->drawctxt_active) kgsl_context_put(&(rb->drawctxt_active->base)); rb->drawctxt_active = NULL; kgsl_sharedmem_writel(rb->device, &rb->pagetable_desc, kgsl_sharedmem_writel(KGSL_DEVICE(adreno_dev), &rb->pagetable_desc, offsetof(struct adreno_ringbuffer_pagetable_info, current_rb_ptname), 0); } Loading drivers/gpu/msm/adreno_a3xx.c +30 −52 Original line number Diff line number Diff line /* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -171,7 +171,7 @@ int adreno_a3xx_pwron_fixup_init(struct adreno_device *adreno_dev) if (test_bit(ADRENO_DEVICE_PWRON_FIXUP, &adreno_dev->priv)) return 0; ret = kgsl_allocate_global(&adreno_dev->dev, ret = kgsl_allocate_global(KGSL_DEVICE(adreno_dev), &adreno_dev->pwron_fixup, PAGE_SIZE, KGSL_MEMFLAGS_GPUREADONLY, 0); Loading Loading @@ -655,7 +655,7 @@ static int a3xx_rb_init(struct adreno_device *adreno_dev, ret = adreno_ringbuffer_submit_spin(rb, NULL, 2000); if (ret) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); dev_err(device->dev, "CP initialization failed to idle\n"); kgsl_device_snapshot(device, NULL); Loading @@ -671,7 +671,7 @@ static int a3xx_rb_init(struct adreno_device *adreno_dev, */ static void a3xx_err_callback(struct adreno_device *adreno_dev, int bit) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); unsigned int reg; switch (bit) { Loading Loading @@ -1220,7 +1220,7 @@ static void a3xx_perfcounter_close(struct adreno_device *adreno_dev) */ static void a3xx_protect_init(struct adreno_device *adreno_dev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); int index = 0; struct kgsl_protected_registers *iommu_regs; Loading Loading @@ -1259,7 +1259,7 @@ static void a3xx_protect_init(struct adreno_device *adreno_dev) static void a3xx_start(struct adreno_device *adreno_dev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); adreno_vbif_start(adreno_dev, a3xx_vbif_platforms, Loading Loading @@ -1500,7 +1500,7 @@ static int _load_firmware(struct kgsl_device *device, const char *fwfile, int a3xx_microcode_read(struct adreno_device *adreno_dev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); if (adreno_dev->pm4_fw == NULL) { int len; Loading Loading @@ -1555,56 +1555,49 @@ int a3xx_microcode_read(struct adreno_device *adreno_dev) return 0; } /** * adreno_ringbuffer_load_pm4_ucode() - Load pm4 ucode * @device: Pointer to a KGSL device * load_pm4_ucode() - Load pm4 ucode * @adreno_dev: Pointer to an adreno device * @start: Starting index in pm4 ucode to load * @end: Ending index of pm4 ucode to load * @addr: Address to load the pm4 ucode * * Load the pm4 ucode from @start at @addr. */ static inline int adreno_ringbuffer_load_pm4_ucode(struct kgsl_device *device, static inline void load_pm4_ucode(struct adreno_device *adreno_dev, unsigned int start, unsigned int end, unsigned int addr) { struct adreno_device *adreno_dev = ADRENO_DEVICE(device); int i; adreno_writereg(adreno_dev, ADRENO_REG_CP_ME_RAM_WADDR, addr); for (i = start; i < end; i++) adreno_writereg(adreno_dev, ADRENO_REG_CP_ME_RAM_DATA, adreno_dev->pm4_fw[i]); return 0; } /** * adreno_ringbuffer_load_pfp_ucode() - Load pfp ucode * @device: Pointer to a KGSL device * load_pfp_ucode() - Load pfp ucode * @adreno_dev: Pointer to an adreno device * @start: Starting index in pfp ucode to load * @end: Ending index of pfp ucode to load * @addr: Address to load the pfp ucode * * Load the pfp ucode from @start at @addr. */ static inline int adreno_ringbuffer_load_pfp_ucode(struct kgsl_device *device, static inline void load_pfp_ucode(struct adreno_device *adreno_dev, unsigned int start, unsigned int end, unsigned int addr) { struct adreno_device *adreno_dev = ADRENO_DEVICE(device); int i; adreno_writereg(adreno_dev, ADRENO_REG_CP_PFP_UCODE_ADDR, addr); for (i = start; i < end; i++) adreno_writereg(adreno_dev, ADRENO_REG_CP_PFP_UCODE_DATA, adreno_dev->pfp_fw[i]); return 0; } /** * _ringbuffer_bootstrap_ucode() - Bootstrap GPU Ucode * @rb: Pointer to adreno ringbuffer * @adreno_dev: Pointer to an adreno device * @rb: The ringbuffer to boostrap the code into * @load_jt: If non zero only load Jump tables * * Bootstrap ucode for GPU Loading @@ -1620,14 +1613,13 @@ static inline int adreno_ringbuffer_load_pfp_ucode(struct kgsl_device *device, * PFP dwords from microcode to bootstrap * PM4 size dwords from microcode to bootstrap */ static int _ringbuffer_bootstrap_ucode(struct adreno_ringbuffer *rb, unsigned int load_jt) static int _ringbuffer_bootstrap_ucode(struct adreno_device *adreno_dev, struct adreno_ringbuffer *rb, unsigned int load_jt) { struct kgsl_device *device = KGSL_DEVICE(adreno_dev); unsigned int *cmds, bootstrap_size, rb_size; int i = 0; int ret; struct kgsl_device *device = rb->device; struct adreno_device *adreno_dev = ADRENO_DEVICE(device); unsigned int pm4_size, pm4_idx, pm4_addr, pfp_size, pfp_idx, pfp_addr; /* Only bootstrap jump tables of ucode */ Loading Loading @@ -1728,11 +1720,10 @@ static int _ringbuffer_bootstrap_ucode(struct adreno_ringbuffer *rb, } /* idle device to validate bootstrap */ ret = adreno_spin_idle(device, 2000); ret = adreno_spin_idle(adreno_dev, 2000); if (ret) { KGSL_DRV_ERR(rb->device, "microcode bootstrap failed to idle\n"); KGSL_DRV_ERR(device, "microcode bootstrap failed to idle\n"); kgsl_device_snapshot(device, NULL); } Loading @@ -1749,7 +1740,6 @@ int a3xx_microcode_load(struct adreno_device *adreno_dev, { int status; struct adreno_ringbuffer *rb = ADRENO_CURRENT_RINGBUFFER(adreno_dev); struct kgsl_device *device = rb->device; if (start_type == ADRENO_START_COLD) { /* If bootstrapping if supported to load ucode */ Loading @@ -1765,59 +1755,47 @@ int a3xx_microcode_load(struct adreno_device *adreno_dev, * microcode. */ status = adreno_ringbuffer_load_pm4_ucode(rb->device, 1, load_pm4_ucode(adreno_dev, 1, adreno_dev->gpucore->pm4_bstrp_size+1, 0); if (status != 0) return status; status = adreno_ringbuffer_load_pfp_ucode(rb->device, 1, load_pfp_ucode(adreno_dev, 1, adreno_dev->gpucore->pfp_bstrp_size+1, 0); if (status != 0) return status; /* Bootstrap rest of the ucode here */ status = _ringbuffer_bootstrap_ucode(rb, 0); status = _ringbuffer_bootstrap_ucode(adreno_dev, rb, 0); if (status != 0) return status; } else { /* load the CP ucode using AHB writes */ status = adreno_ringbuffer_load_pm4_ucode(rb->device, 1, adreno_dev->pm4_fw_size, 0); if (status != 0) return status; load_pm4_ucode(adreno_dev, 1, adreno_dev->pm4_fw_size, 0); /* load the prefetch parser ucode using AHB writes */ status = adreno_ringbuffer_load_pfp_ucode(rb->device, 1, adreno_dev->pfp_fw_size, 0); if (status != 0) return status; load_pfp_ucode(adreno_dev, 1, adreno_dev->pfp_fw_size, 0); } } else if (start_type == ADRENO_START_WARM) { /* If bootstrapping if supported to load jump tables */ if (adreno_bootstrap_ucode(adreno_dev)) { status = _ringbuffer_bootstrap_ucode(rb, 1); status = _ringbuffer_bootstrap_ucode(adreno_dev, rb, 1); if (status != 0) return status; } else { /* load the CP jump tables using AHB writes */ status = adreno_ringbuffer_load_pm4_ucode(device, load_pm4_ucode(adreno_dev, adreno_dev->gpucore->pm4_jt_idx, adreno_dev->pm4_fw_size, adreno_dev->gpucore->pm4_jt_addr); if (status != 0) return status; /* * load the prefetch parser jump tables using AHB writes */ status = adreno_ringbuffer_load_pfp_ucode(device, load_pfp_ucode(adreno_dev, adreno_dev->gpucore->pfp_jt_idx, adreno_dev->pfp_fw_size, adreno_dev->gpucore->pfp_jt_addr); if (status != 0) return status; } } else return -EINVAL; Loading drivers/gpu/msm/adreno_a3xx_snapshot.c +2 −2 Original line number Diff line number Diff line /* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -296,7 +296,7 @@ static void _snapshot_hlsq_regs(struct kgsl_device *device, void a3xx_snapshot(struct adreno_device *adreno_dev, struct kgsl_snapshot *snapshot) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); struct adreno_snapshot_data *snap_data = gpudev->snapshot_data; unsigned int reg; Loading Loading
drivers/devfreq/governor_msm_adreno_tz.c +7 −2 Original line number Diff line number Diff line /* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2010-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -520,7 +520,12 @@ static int tz_handler(struct devfreq *devfreq, unsigned int event, void *data) static void _do_partner_event(struct work_struct *work, unsigned int event) { struct devfreq *bus_devfreq = partner_gpu_profile->bus_devfreq; struct devfreq *bus_devfreq; if (partner_gpu_profile == NULL) return; bus_devfreq = partner_gpu_profile->bus_devfreq; if (bus_devfreq != NULL && bus_devfreq->governor && Loading
drivers/gpu/msm/adreno.c +98 −87 Original line number Diff line number Diff line Loading @@ -57,7 +57,7 @@ MODULE_PARM_DESC(nopreempt, "Disable GPU preemption"); #define KGSL_LOG_LEVEL_DEFAULT 3 static void adreno_input_work(struct work_struct *work); static unsigned int counter_delta(struct adreno_device *adreno_dev, static unsigned int counter_delta(struct kgsl_device *device, unsigned int reg, unsigned int *counter); static struct devfreq_msm_adreno_tz_data adreno_tz_data = { Loading Loading @@ -138,7 +138,7 @@ void adreno_readreg64(struct adreno_device *adreno_dev, { struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); unsigned int val_lo = 0, val_hi = 0; struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); if (adreno_checkreg_off(adreno_dev, lo)) kgsl_regread(device, gpudev->reg_offsets->offsets[lo], &val_lo); Loading @@ -160,14 +160,13 @@ void adreno_writereg64(struct adreno_device *adreno_dev, enum adreno_regs lo, enum adreno_regs hi, uint64_t val) { struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); struct kgsl_device *device = &adreno_dev->dev; if (adreno_checkreg_off(adreno_dev, lo)) kgsl_regwrite(device, gpudev->reg_offsets->offsets[lo], lower_32_bits(val)); kgsl_regwrite(KGSL_DEVICE(adreno_dev), gpudev->reg_offsets->offsets[lo], lower_32_bits(val)); if (adreno_checkreg_off(adreno_dev, hi)) kgsl_regwrite(device, gpudev->reg_offsets->offsets[hi], upper_32_bits(val)); kgsl_regwrite(KGSL_DEVICE(adreno_dev), gpudev->reg_offsets->offsets[hi], upper_32_bits(val)); } /** Loading @@ -190,7 +189,7 @@ static size_t efuse_len; int adreno_efuse_map(struct adreno_device *adreno_dev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct resource *res; if (efuse_base != NULL) Loading Loading @@ -395,19 +394,6 @@ static struct platform_driver kgsl_iommu_platform_driver = { } }; static int __init kgsl_iommu_pdev_init(void) { return platform_driver_register(&kgsl_iommu_platform_driver); } static void __exit kgsl_iommu_pdev_exit(void) { platform_driver_unregister(&kgsl_iommu_platform_driver); } module_init(kgsl_iommu_pdev_init); module_exit(kgsl_iommu_pdev_exit); static int _get_counter(struct adreno_device *adreno_dev, int group, int countable, unsigned int *lo, unsigned int *hi) Loading @@ -420,12 +406,10 @@ static int _get_counter(struct adreno_device *adreno_dev, lo, hi, PERFCOUNTER_FLAG_KERNEL); if (ret) { struct kgsl_device *device = &adreno_dev->dev; KGSL_DRV_ERR(device, KGSL_DRV_ERR(KGSL_DEVICE(adreno_dev), "Unable to allocate fault detect performance counter %d/%d\n", group, countable); KGSL_DRV_ERR(device, KGSL_DRV_ERR(KGSL_DEVICE(adreno_dev), "GPU fault detect will be less reliable\n"); } } Loading Loading @@ -514,7 +498,7 @@ static void adreno_input_work(struct work_struct *work) { struct adreno_device *adreno_dev = container_of(work, struct adreno_device, input_work); struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); mutex_lock(&device->mutex); Loading Loading @@ -708,14 +692,12 @@ void adreno_irqctrl(struct adreno_device *adreno_dev, int state) */ void adreno_hang_int_callback(struct adreno_device *adreno_dev, int bit) { struct kgsl_device *device = &adreno_dev->dev; KGSL_DRV_CRIT(device, "MISC: GPU hang detected\n"); KGSL_DRV_CRIT(KGSL_DEVICE(adreno_dev), "MISC: GPU hang detected\n"); adreno_irqctrl(adreno_dev, 0); /* Trigger a fault in the dispatcher - this will effect a restart */ adreno_set_gpu_fault(ADRENO_DEVICE(device), ADRENO_HARD_FAULT); adreno_dispatcher_schedule(device); adreno_set_gpu_fault(adreno_dev, ADRENO_HARD_FAULT); adreno_dispatcher_schedule(KGSL_DEVICE(adreno_dev)); } /* Loading @@ -727,7 +709,7 @@ void adreno_hang_int_callback(struct adreno_device *adreno_dev, int bit) */ void adreno_cp_callback(struct adreno_device *adreno_dev, int bit) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); kgsl_schedule_work(&device->event_work); adreno_dispatcher_schedule(device); Loading Loading @@ -800,16 +782,16 @@ adreno_identify_gpu(struct adreno_device *adreno_dev) struct adreno_gpudev *gpudev; int i; if (kgsl_property_read_u32(&adreno_dev->dev, "qcom,chipid", if (kgsl_property_read_u32(KGSL_DEVICE(adreno_dev), "qcom,chipid", &adreno_dev->chipid)) KGSL_DRV_FATAL(&adreno_dev->dev, KGSL_DRV_FATAL(KGSL_DEVICE(adreno_dev), "No GPU chip ID was specified\n"); adreno_dev->gpucore = _get_gpu_core(adreno_dev->chipid); if (adreno_dev->gpucore == NULL) KGSL_DRV_FATAL(&adreno_dev->dev, "Unknown GPU chip ID %8.8X\n", adreno_dev->chipid); KGSL_DRV_FATAL(KGSL_DEVICE(adreno_dev), "Unknown GPU chip ID %8.8X\n", adreno_dev->chipid); /* * The gmem size might be dynamic when ocmem is involved so copy it out Loading Loading @@ -851,7 +833,7 @@ static const struct of_device_id adreno_match_table[] = { static int adreno_of_parse_pwrlevels(struct adreno_device *adreno_dev, struct device_node *node) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct kgsl_pwrctrl *pwr = &device->pwrctrl; struct device_node *child; Loading Loading @@ -951,7 +933,7 @@ static struct { static int adreno_of_get_power(struct adreno_device *adreno_dev, struct platform_device *pdev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct kgsl_pwrctrl *pwr = &device->pwrctrl; struct device_node *node = pdev->dev.of_node; int i, init_level; Loading Loading @@ -1067,7 +1049,7 @@ static int adreno_probe(struct platform_device *pdev) return -ENODEV; } device = &adreno_dev->dev; device = KGSL_DEVICE(adreno_dev); device->pdev = pdev; device->mmu.priv = &device_3d0_iommu; Loading Loading @@ -1116,7 +1098,7 @@ static int adreno_probe(struct platform_device *pdev) adreno_debugfs_init(adreno_dev); adreno_profile_init(adreno_dev); adreno_sysfs_init(device); adreno_sysfs_init(adreno_dev); kgsl_pwrscale_init(&pdev->dev, CONFIG_MSM_ADRENO_DEFAULT_GOVERNOR); Loading Loading @@ -1145,7 +1127,8 @@ out: static void _adreno_free_memories(struct adreno_device *adreno_dev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); if (test_bit(ADRENO_DEVICE_CMDBATCH_PROFILE, &adreno_dev->priv)) kgsl_free_global(device, &adreno_dev->cmdbatch_profile_buffer); Loading @@ -1171,7 +1154,7 @@ static int adreno_remove(struct platform_device *pdev) if (adreno_dev == NULL) return 0; device = &adreno_dev->dev; device = KGSL_DEVICE(adreno_dev); /* The memory is fading */ _adreno_free_memories(adreno_dev); Loading @@ -1179,7 +1162,7 @@ static int adreno_remove(struct platform_device *pdev) #ifdef CONFIG_INPUT input_unregister_handler(&adreno_input_handler); #endif adreno_sysfs_close(device); adreno_sysfs_close(adreno_dev); adreno_coresight_remove(adreno_dev); adreno_profile_close(adreno_dev); Loading Loading @@ -1334,7 +1317,7 @@ static int adreno_init(struct kgsl_device *device) */ if (!adreno_is_a3xx(adreno_dev)) { int r = kgsl_allocate_global(&adreno_dev->dev, int r = kgsl_allocate_global(device, &adreno_dev->cmdbatch_profile_buffer, PAGE_SIZE, 0, 0); adreno_dev->cmdbatch_profile_index = 0; Loading @@ -1342,7 +1325,7 @@ static int adreno_init(struct kgsl_device *device) if (r == 0) { set_bit(ADRENO_DEVICE_CMDBATCH_PROFILE, &adreno_dev->priv); kgsl_sharedmem_set(&adreno_dev->dev, kgsl_sharedmem_set(device, &adreno_dev->cmdbatch_profile_buffer, 0, 0, PAGE_SIZE); } Loading Loading @@ -1435,7 +1418,7 @@ static uint64_t _read_throttling_counters(struct adreno_device *adreno_dev) if (!adreno_dev->gpmu_throttle_counters[i]) return 0; th[i] = counter_delta(adreno_dev, th[i] = counter_delta(KGSL_DEVICE(adreno_dev), adreno_dev->gpmu_throttle_counters[i], &busy->throttle_cycles[i]); } Loading @@ -1448,7 +1431,8 @@ static void _update_threshold_count(struct adreno_device *adreno_dev, uint64_t adj) { if (adreno_is_a530(adreno_dev)) kgsl_regread(&adreno_dev->dev, adreno_dev->lm_threshold_count, kgsl_regread(KGSL_DEVICE(adreno_dev), adreno_dev->lm_threshold_count, &adreno_dev->lm_threshold_cross); else if (adreno_is_a540(adreno_dev)) adreno_dev->lm_threshold_cross = adj; Loading @@ -1463,7 +1447,7 @@ static void _update_threshold_count(struct adreno_device *adreno_dev, */ static int _adreno_start(struct adreno_device *adreno_dev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); int status = -EINVAL, ret; unsigned int state = device->state; Loading Loading @@ -2096,9 +2080,9 @@ static int adreno_setproperty(struct kgsl_device_private *dev_priv, if (enable) { device->pwrctrl.ctrl_flags = 0; if (!kgsl_active_count_get(&adreno_dev->dev)) { if (!kgsl_active_count_get(device)) { adreno_fault_detect_start(adreno_dev); kgsl_active_count_put(&adreno_dev->dev); kgsl_active_count_put(device); } kgsl_pwrscale_enable(device); Loading Loading @@ -2306,17 +2290,16 @@ bool adreno_isidle(struct kgsl_device *device) /** * adreno_spin_idle() - Spin wait for the GPU to idle * @device: Pointer to the KGSL device * @adreno_dev: Pointer to an adreno device * @timeout: milliseconds to wait before returning error * * Spin the CPU waiting for the RBBM status to return idle */ int adreno_spin_idle(struct kgsl_device *device, unsigned int timeout) int adreno_spin_idle(struct adreno_device *adreno_dev, unsigned int timeout) { struct adreno_device *adreno_dev = ADRENO_DEVICE(device); unsigned long wait = jiffies + msecs_to_jiffies(timeout); kgsl_cffdump_regpoll(device, kgsl_cffdump_regpoll(KGSL_DEVICE(adreno_dev), adreno_getreg(adreno_dev, ADRENO_REG_RBBM_STATUS) << 2, 0x00000000, 0x80000000); Loading @@ -2331,7 +2314,7 @@ int adreno_spin_idle(struct kgsl_device *device, unsigned int timeout) if (adreno_gpu_fault(adreno_dev) != 0) return -EDEADLK; if (adreno_isidle(device)) if (adreno_isidle(KGSL_DEVICE(adreno_dev))) return 0; } Loading Loading @@ -2368,7 +2351,7 @@ int adreno_idle(struct kgsl_device *device) if (ret) return ret; return adreno_spin_idle(device, ADRENO_IDLE_TIMEOUT); return adreno_spin_idle(adreno_dev, ADRENO_IDLE_TIMEOUT); } /** Loading Loading @@ -2531,14 +2514,15 @@ static int adreno_waittimestamp(struct kgsl_device *device, /** * __adreno_readtimestamp() - Reads the timestamp from memstore memory * @device: Pointer to device whose memstore is read * @adreno_dev: Pointer to an adreno device * @index: Index into the memstore memory * @type: Type of timestamp to read * @timestamp: The out parameter where the timestamp is read */ static int __adreno_readtimestamp(struct kgsl_device *device, int index, static int __adreno_readtimestamp(struct adreno_device *adreno_dev, int index, int type, unsigned int *timestamp) { struct kgsl_device *device = KGSL_DEVICE(adreno_dev); int status = 0; switch (type) { Loading @@ -2561,7 +2545,7 @@ static int __adreno_readtimestamp(struct kgsl_device *device, int index, /** * adreno_rb_readtimestamp(): Return the value of given type of timestamp * for a RB * @device: GPU device whose timestamp values are being queried * @adreno_dev: adreno device whose timestamp values are being queried * @priv: The object being queried for a timestamp (expected to be a rb pointer) * @type: The type of timestamp (one of 3) to be read * @timestamp: Pointer to where the read timestamp is to be written to Loading @@ -2573,7 +2557,7 @@ static int __adreno_readtimestamp(struct kgsl_device *device, int index, * The function returns 0 on success and timestamp value at the *timestamp * address and returns -EINVAL on any read error/invalid type and timestamp = 0. */ int adreno_rb_readtimestamp(struct kgsl_device *device, int adreno_rb_readtimestamp(struct adreno_device *adreno_dev, void *priv, enum kgsl_timestamp_type type, unsigned int *timestamp) { Loading @@ -2590,7 +2574,7 @@ int adreno_rb_readtimestamp(struct kgsl_device *device, if (KGSL_TIMESTAMP_QUEUED == type) *timestamp = rb->timestamp; else status = __adreno_readtimestamp(device, status = __adreno_readtimestamp(adreno_dev, rb->id + KGSL_MEMSTORE_MAX, type, timestamp); Loading Loading @@ -2630,7 +2614,7 @@ static int adreno_readtimestamp(struct kgsl_device *device, if (KGSL_TIMESTAMP_QUEUED == type) *timestamp = adreno_context_timestamp(context); else status = __adreno_readtimestamp(device, status = __adreno_readtimestamp(ADRENO_DEVICE(device), context->id, type, timestamp); return status; Loading @@ -2642,10 +2626,9 @@ static inline s64 adreno_ticks_to_us(u32 ticks, u32 freq) return ticks / freq; } static unsigned int counter_delta(struct adreno_device *adreno_dev, static unsigned int counter_delta(struct kgsl_device *device, unsigned int reg, unsigned int *counter) { struct kgsl_device *device = &adreno_dev->dev; unsigned int val; unsigned int ret = 0; Loading Loading @@ -2685,7 +2668,7 @@ static void adreno_power_stats(struct kgsl_device *device, if (adreno_dev->perfctr_pwr_lo != 0) { uint64_t gpu_busy; gpu_busy = counter_delta(adreno_dev, adreno_dev->perfctr_pwr_lo, gpu_busy = counter_delta(device, adreno_dev->perfctr_pwr_lo, &busy->gpu_busy); adj = _read_throttling_counters(adreno_dev); Loading @@ -2698,12 +2681,12 @@ static void adreno_power_stats(struct kgsl_device *device, uint64_t ram_cycles = 0, starved_ram = 0; if (adreno_dev->ram_cycles_lo != 0) ram_cycles = counter_delta(adreno_dev, ram_cycles = counter_delta(device, adreno_dev->ram_cycles_lo, &busy->vbif_ram_cycles); if (adreno_dev->starved_ram_lo != 0) starved_ram = counter_delta(adreno_dev, starved_ram = counter_delta(device, adreno_dev->starved_ram_lo, &busy->vbif_starved_ram); Loading Loading @@ -2906,20 +2889,6 @@ static struct platform_driver adreno_platform_driver = { } }; static int __init kgsl_3d_init(void) { return platform_driver_register(&adreno_platform_driver); } static void __exit kgsl_3d_exit(void) { platform_driver_unregister(&adreno_platform_driver); } module_init(kgsl_3d_init); module_exit(kgsl_3d_exit); static struct of_device_id busmon_match_table[] = { { .compatible = "qcom,kgsl-busmon", .data = &device_3d0 }, {} Loading Loading @@ -2950,18 +2919,60 @@ static struct platform_driver kgsl_bus_platform_driver = { } }; static int __init kgsl_busmon_init(void) #if defined(CONFIG_ARM_SMMU) || defined(CONFIG_MSM_IOMMU) static int kgsl_iommu_driver_register(void) { return platform_driver_register(&kgsl_iommu_platform_driver); } static void kgsl_iommu_driver_unregister(void) { platform_driver_unregister(&kgsl_iommu_platform_driver); } #else static inline int kgsl_iommu_driver_register(void) { return 0; } static inline void kgsl_iommu_driver_unregister(void) { return platform_driver_register(&kgsl_bus_platform_driver); } #endif static int __init kgsl_3d_init(void) { int ret; ret = platform_driver_register(&kgsl_bus_platform_driver); if (ret) return ret; ret = kgsl_iommu_driver_register(); if (ret) { platform_driver_unregister(&kgsl_bus_platform_driver); return ret; } ret = platform_driver_register(&adreno_platform_driver); if (ret) { kgsl_iommu_driver_unregister(); platform_driver_unregister(&kgsl_bus_platform_driver); } static void __exit kgsl_busmon_exit(void) return ret; } static void __exit kgsl_3d_exit(void) { platform_driver_unregister(&adreno_platform_driver); kgsl_iommu_driver_unregister(); platform_driver_unregister(&kgsl_bus_platform_driver); } module_init(kgsl_busmon_init); module_exit(kgsl_busmon_exit); module_init(kgsl_3d_init); module_exit(kgsl_3d_exit); MODULE_DESCRIPTION("3D Graphics driver"); MODULE_VERSION("1.2"); Loading
drivers/gpu/msm/adreno.h +14 −10 Original line number Diff line number Diff line Loading @@ -39,6 +39,9 @@ #define ADRENO_DEVICE(device) \ container_of(device, struct adreno_device, dev) /* KGSL_DEVICE - given an adreno_device, return the KGSL device struct */ #define KGSL_DEVICE(_dev) (&((_dev)->dev)) /* ADRENO_CONTEXT - Given a context return the adreno context struct */ #define ADRENO_CONTEXT(context) \ container_of(context, struct adreno_context, base) Loading Loading @@ -818,7 +821,7 @@ long adreno_ioctl_helper(struct kgsl_device_private *dev_priv, unsigned int cmd, unsigned long arg, const struct kgsl_ioctl *cmds, int len); int adreno_spin_idle(struct kgsl_device *device, unsigned int timeout); int adreno_spin_idle(struct adreno_device *device, unsigned int timeout); int adreno_idle(struct kgsl_device *device); bool adreno_isidle(struct kgsl_device *device); Loading @@ -836,7 +839,7 @@ void adreno_snapshot(struct kgsl_device *device, int adreno_reset(struct kgsl_device *device, int fault); void adreno_fault_skipcmd_detached(struct kgsl_device *device, void adreno_fault_skipcmd_detached(struct adreno_device *adreno_dev, struct adreno_context *drawctxt, struct kgsl_cmdbatch *cmdbatch); Loading Loading @@ -876,8 +879,8 @@ unsigned int adreno_iommu_set_pt_generate_cmds( unsigned int *cmds, struct kgsl_pagetable *pt); int adreno_sysfs_init(struct kgsl_device *device); void adreno_sysfs_close(struct kgsl_device *device); int adreno_sysfs_init(struct adreno_device *adreno_dev); void adreno_sysfs_close(struct adreno_device *adreno_dev); void adreno_irqctrl(struct adreno_device *adreno_dev, int state); Loading Loading @@ -1044,7 +1047,7 @@ static inline void adreno_readreg(struct adreno_device *adreno_dev, { struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); if (adreno_checkreg_off(adreno_dev, offset_name)) kgsl_regread(&adreno_dev->dev, kgsl_regread(KGSL_DEVICE(adreno_dev), gpudev->reg_offsets->offsets[offset_name], val); else *val = 0; Loading @@ -1062,7 +1065,7 @@ static inline void adreno_writereg(struct adreno_device *adreno_dev, { struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); if (adreno_checkreg_off(adreno_dev, offset_name)) kgsl_regwrite(&adreno_dev->dev, kgsl_regwrite(KGSL_DEVICE(adreno_dev), gpudev->reg_offsets->offsets[offset_name], val); } Loading Loading @@ -1185,7 +1188,7 @@ static inline void adreno_vbif_start(struct adreno_device *adreno_dev, } while ((vbif != NULL) && (vbif->reg != 0)) { kgsl_regwrite(&adreno_dev->dev, vbif->reg, vbif->val); kgsl_regwrite(KGSL_DEVICE(adreno_dev), vbif->reg, vbif->val); vbif++; } } Loading Loading @@ -1232,7 +1235,7 @@ static inline void adreno_set_protected_registers( val = 0x60000000 | ((mask_len & 0x1F) << 24) | ((reg << 2) & 0xFFFFF); kgsl_regwrite(&adreno_dev->dev, base + offset, val); kgsl_regwrite(KGSL_DEVICE(adreno_dev), base + offset, val); *index = *index + 1; } Loading Loading @@ -1314,7 +1317,7 @@ static inline unsigned int adreno_preempt_state( static inline unsigned int adreno_get_rptr(struct adreno_ringbuffer *rb) { struct adreno_device *adreno_dev = ADRENO_DEVICE(rb->device); struct adreno_device *adreno_dev = ADRENO_RB_DEVICE(rb); if (adreno_dev->cur_rb == rb && adreno_preempt_state(adreno_dev, ADRENO_DISPATCHER_PREEMPT_CLEAR)) Loading Loading @@ -1378,7 +1381,8 @@ static inline void adreno_set_active_ctxs_null(struct adreno_device *adreno_dev) if (rb->drawctxt_active) kgsl_context_put(&(rb->drawctxt_active->base)); rb->drawctxt_active = NULL; kgsl_sharedmem_writel(rb->device, &rb->pagetable_desc, kgsl_sharedmem_writel(KGSL_DEVICE(adreno_dev), &rb->pagetable_desc, offsetof(struct adreno_ringbuffer_pagetable_info, current_rb_ptname), 0); } Loading
drivers/gpu/msm/adreno_a3xx.c +30 −52 Original line number Diff line number Diff line /* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -171,7 +171,7 @@ int adreno_a3xx_pwron_fixup_init(struct adreno_device *adreno_dev) if (test_bit(ADRENO_DEVICE_PWRON_FIXUP, &adreno_dev->priv)) return 0; ret = kgsl_allocate_global(&adreno_dev->dev, ret = kgsl_allocate_global(KGSL_DEVICE(adreno_dev), &adreno_dev->pwron_fixup, PAGE_SIZE, KGSL_MEMFLAGS_GPUREADONLY, 0); Loading Loading @@ -655,7 +655,7 @@ static int a3xx_rb_init(struct adreno_device *adreno_dev, ret = adreno_ringbuffer_submit_spin(rb, NULL, 2000); if (ret) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); dev_err(device->dev, "CP initialization failed to idle\n"); kgsl_device_snapshot(device, NULL); Loading @@ -671,7 +671,7 @@ static int a3xx_rb_init(struct adreno_device *adreno_dev, */ static void a3xx_err_callback(struct adreno_device *adreno_dev, int bit) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); unsigned int reg; switch (bit) { Loading Loading @@ -1220,7 +1220,7 @@ static void a3xx_perfcounter_close(struct adreno_device *adreno_dev) */ static void a3xx_protect_init(struct adreno_device *adreno_dev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); int index = 0; struct kgsl_protected_registers *iommu_regs; Loading Loading @@ -1259,7 +1259,7 @@ static void a3xx_protect_init(struct adreno_device *adreno_dev) static void a3xx_start(struct adreno_device *adreno_dev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); adreno_vbif_start(adreno_dev, a3xx_vbif_platforms, Loading Loading @@ -1500,7 +1500,7 @@ static int _load_firmware(struct kgsl_device *device, const char *fwfile, int a3xx_microcode_read(struct adreno_device *adreno_dev) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); if (adreno_dev->pm4_fw == NULL) { int len; Loading Loading @@ -1555,56 +1555,49 @@ int a3xx_microcode_read(struct adreno_device *adreno_dev) return 0; } /** * adreno_ringbuffer_load_pm4_ucode() - Load pm4 ucode * @device: Pointer to a KGSL device * load_pm4_ucode() - Load pm4 ucode * @adreno_dev: Pointer to an adreno device * @start: Starting index in pm4 ucode to load * @end: Ending index of pm4 ucode to load * @addr: Address to load the pm4 ucode * * Load the pm4 ucode from @start at @addr. */ static inline int adreno_ringbuffer_load_pm4_ucode(struct kgsl_device *device, static inline void load_pm4_ucode(struct adreno_device *adreno_dev, unsigned int start, unsigned int end, unsigned int addr) { struct adreno_device *adreno_dev = ADRENO_DEVICE(device); int i; adreno_writereg(adreno_dev, ADRENO_REG_CP_ME_RAM_WADDR, addr); for (i = start; i < end; i++) adreno_writereg(adreno_dev, ADRENO_REG_CP_ME_RAM_DATA, adreno_dev->pm4_fw[i]); return 0; } /** * adreno_ringbuffer_load_pfp_ucode() - Load pfp ucode * @device: Pointer to a KGSL device * load_pfp_ucode() - Load pfp ucode * @adreno_dev: Pointer to an adreno device * @start: Starting index in pfp ucode to load * @end: Ending index of pfp ucode to load * @addr: Address to load the pfp ucode * * Load the pfp ucode from @start at @addr. */ static inline int adreno_ringbuffer_load_pfp_ucode(struct kgsl_device *device, static inline void load_pfp_ucode(struct adreno_device *adreno_dev, unsigned int start, unsigned int end, unsigned int addr) { struct adreno_device *adreno_dev = ADRENO_DEVICE(device); int i; adreno_writereg(adreno_dev, ADRENO_REG_CP_PFP_UCODE_ADDR, addr); for (i = start; i < end; i++) adreno_writereg(adreno_dev, ADRENO_REG_CP_PFP_UCODE_DATA, adreno_dev->pfp_fw[i]); return 0; } /** * _ringbuffer_bootstrap_ucode() - Bootstrap GPU Ucode * @rb: Pointer to adreno ringbuffer * @adreno_dev: Pointer to an adreno device * @rb: The ringbuffer to boostrap the code into * @load_jt: If non zero only load Jump tables * * Bootstrap ucode for GPU Loading @@ -1620,14 +1613,13 @@ static inline int adreno_ringbuffer_load_pfp_ucode(struct kgsl_device *device, * PFP dwords from microcode to bootstrap * PM4 size dwords from microcode to bootstrap */ static int _ringbuffer_bootstrap_ucode(struct adreno_ringbuffer *rb, unsigned int load_jt) static int _ringbuffer_bootstrap_ucode(struct adreno_device *adreno_dev, struct adreno_ringbuffer *rb, unsigned int load_jt) { struct kgsl_device *device = KGSL_DEVICE(adreno_dev); unsigned int *cmds, bootstrap_size, rb_size; int i = 0; int ret; struct kgsl_device *device = rb->device; struct adreno_device *adreno_dev = ADRENO_DEVICE(device); unsigned int pm4_size, pm4_idx, pm4_addr, pfp_size, pfp_idx, pfp_addr; /* Only bootstrap jump tables of ucode */ Loading Loading @@ -1728,11 +1720,10 @@ static int _ringbuffer_bootstrap_ucode(struct adreno_ringbuffer *rb, } /* idle device to validate bootstrap */ ret = adreno_spin_idle(device, 2000); ret = adreno_spin_idle(adreno_dev, 2000); if (ret) { KGSL_DRV_ERR(rb->device, "microcode bootstrap failed to idle\n"); KGSL_DRV_ERR(device, "microcode bootstrap failed to idle\n"); kgsl_device_snapshot(device, NULL); } Loading @@ -1749,7 +1740,6 @@ int a3xx_microcode_load(struct adreno_device *adreno_dev, { int status; struct adreno_ringbuffer *rb = ADRENO_CURRENT_RINGBUFFER(adreno_dev); struct kgsl_device *device = rb->device; if (start_type == ADRENO_START_COLD) { /* If bootstrapping if supported to load ucode */ Loading @@ -1765,59 +1755,47 @@ int a3xx_microcode_load(struct adreno_device *adreno_dev, * microcode. */ status = adreno_ringbuffer_load_pm4_ucode(rb->device, 1, load_pm4_ucode(adreno_dev, 1, adreno_dev->gpucore->pm4_bstrp_size+1, 0); if (status != 0) return status; status = adreno_ringbuffer_load_pfp_ucode(rb->device, 1, load_pfp_ucode(adreno_dev, 1, adreno_dev->gpucore->pfp_bstrp_size+1, 0); if (status != 0) return status; /* Bootstrap rest of the ucode here */ status = _ringbuffer_bootstrap_ucode(rb, 0); status = _ringbuffer_bootstrap_ucode(adreno_dev, rb, 0); if (status != 0) return status; } else { /* load the CP ucode using AHB writes */ status = adreno_ringbuffer_load_pm4_ucode(rb->device, 1, adreno_dev->pm4_fw_size, 0); if (status != 0) return status; load_pm4_ucode(adreno_dev, 1, adreno_dev->pm4_fw_size, 0); /* load the prefetch parser ucode using AHB writes */ status = adreno_ringbuffer_load_pfp_ucode(rb->device, 1, adreno_dev->pfp_fw_size, 0); if (status != 0) return status; load_pfp_ucode(adreno_dev, 1, adreno_dev->pfp_fw_size, 0); } } else if (start_type == ADRENO_START_WARM) { /* If bootstrapping if supported to load jump tables */ if (adreno_bootstrap_ucode(adreno_dev)) { status = _ringbuffer_bootstrap_ucode(rb, 1); status = _ringbuffer_bootstrap_ucode(adreno_dev, rb, 1); if (status != 0) return status; } else { /* load the CP jump tables using AHB writes */ status = adreno_ringbuffer_load_pm4_ucode(device, load_pm4_ucode(adreno_dev, adreno_dev->gpucore->pm4_jt_idx, adreno_dev->pm4_fw_size, adreno_dev->gpucore->pm4_jt_addr); if (status != 0) return status; /* * load the prefetch parser jump tables using AHB writes */ status = adreno_ringbuffer_load_pfp_ucode(device, load_pfp_ucode(adreno_dev, adreno_dev->gpucore->pfp_jt_idx, adreno_dev->pfp_fw_size, adreno_dev->gpucore->pfp_jt_addr); if (status != 0) return status; } } else return -EINVAL; Loading
drivers/gpu/msm/adreno_a3xx_snapshot.c +2 −2 Original line number Diff line number Diff line /* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -296,7 +296,7 @@ static void _snapshot_hlsq_regs(struct kgsl_device *device, void a3xx_snapshot(struct adreno_device *adreno_dev, struct kgsl_snapshot *snapshot) { struct kgsl_device *device = &adreno_dev->dev; struct kgsl_device *device = KGSL_DEVICE(adreno_dev); struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev); struct adreno_snapshot_data *snap_data = gpudev->snapshot_data; unsigned int reg; Loading