Loading include/sound/q6core.h +71 −0 Original line number Diff line number Diff line Loading @@ -79,6 +79,77 @@ struct avcs_cmdrsp_get_license_validation_result { /* Length in bytes of the result that follows this structure*/ }; /* Set Q6 topologies */ /* * Registers custom topologies in the aDSP for * use in audio, voice, AFE and LSM. */ #define AVCS_CMD_SHARED_MEM_MAP_REGIONS 0x00012924 #define AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS 0x00012925 #define AVCS_CMD_SHARED_MEM_UNMAP_REGIONS 0x00012926 #define AVCS_CMD_REGISTER_TOPOLOGIES 0x00012923 /* The payload for the AVCS_CMD_REGISTER_TOPOLOGIES command */ struct avcs_cmd_register_topologies { struct apr_hdr hdr; uint32_t payload_addr_lsw; /* Lower 32 bits of the topology buffer address. */ uint32_t payload_addr_msw; /* Upper 32 bits of the topology buffer address. */ uint32_t mem_map_handle; /* Unique identifier for an address. * -This memory map handle is returned by the aDSP through the * memory map command. * -NULL mem_map_handle is interpreted as in-band parameter * passing. * -Client has the flexibility to choose in-band or out-of-band. * -Out-of-band is recommended in this case. */ uint32_t payload_size; /* Size in bytes of the valid data in the topology buffer. */ } __packed; #define AVCS_CMD_DEREGISTER_TOPOLOGIES 0x0001292a /* The payload for the AVCS_CMD_DEREGISTER_TOPOLOGIES command */ struct avcs_cmd_deregister_topologies { struct apr_hdr hdr; uint32_t payload_addr_lsw; /* Lower 32 bits of the topology buffer address. */ uint32_t payload_addr_msw; /* Upper 32 bits of the topology buffer address. */ uint32_t mem_map_handle; /* Unique identifier for an address. * -This memory map handle is returned by the aDSP through the * memory map command. * -NULL mem_map_handle is interpreted as in-band parameter * passing. * -Client has the flexibility to choose in-band or out-of-band. * -Out-of-band is recommended in this case. */ uint32_t payload_size; /* Size in bytes of the valid data in the topology buffer. */ uint32_t mode; /* 0: Deregister selected topologies * 1: Deregister all topologies */ } __packed; #define AVCS_MODE_DEREGISTER_ALL_CUSTOM_TOPOLOGIES 1 int32_t core_set_license(uint32_t key, uint32_t module_id); int32_t core_get_license_status(uint32_t module_id); Loading include/uapi/linux/msm_audio_calibration.h +2 −0 Original line number Diff line number Diff line Loading @@ -91,6 +91,8 @@ enum { DTS_EAGLE_CAL_TYPE, AUDIO_CORE_METAINFO_CAL_TYPE, SRS_TRUMEDIA_CAL_TYPE, CORE_CUSTOM_TOPOLOGIES_CAL_TYPE, MAX_CAL_TYPES, }; Loading sound/soc/msm/qdsp6v2/audio_cal_utils.c +2 −0 Original line number Diff line number Diff line Loading @@ -55,6 +55,7 @@ size_t get_cal_info_size(int32_t cal_type) size = sizeof(struct audio_cal_info_adm_top); break; case ADM_CUST_TOPOLOGY_CAL_TYPE: case CORE_CUSTOM_TOPOLOGIES_CAL_TYPE: size = 0; break; case ADM_AUDPROC_CAL_TYPE: Loading Loading @@ -180,6 +181,7 @@ size_t get_user_cal_type_size(int32_t cal_type) size = sizeof(struct audio_cal_type_adm_top); break; case ADM_CUST_TOPOLOGY_CAL_TYPE: case CORE_CUSTOM_TOPOLOGIES_CAL_TYPE: size = sizeof(struct audio_cal_type_basic); break; case ADM_AUDPROC_CAL_TYPE: Loading sound/soc/msm/qdsp6v2/q6core.c +407 −25 Original line number Diff line number Diff line Loading @@ -31,6 +31,12 @@ */ #define Q6_READY_TIMEOUT_MS 100 enum { META_CAL, CUST_TOP_CAL, CORE_MAX_CAL }; struct q6core_str { struct apr_svc *core_handle_q; wait_queue_head_t bus_bw_req_wait; Loading @@ -46,7 +52,9 @@ struct q6core_str { cmdrsp_license_result; } cmd_resp_payload; u32 param; struct cal_type_data *cal_data; struct cal_type_data *cal_data[CORE_MAX_CAL]; uint32_t mem_map_cal_handle; int32_t adsp_status; }; static struct q6core_str q6core_lcl; Loading Loading @@ -85,6 +93,32 @@ static int32_t aprv2_core_fn_q(struct apr_client_data *data, void *priv) switch (payload1[0]) { case AVCS_CMD_SHARED_MEM_UNMAP_REGIONS: pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS status[0x%x]\n", __func__, payload1[1]); q6core_lcl.bus_bw_resp_received = 1; wake_up(&q6core_lcl.bus_bw_req_wait); break; case AVCS_CMD_SHARED_MEM_MAP_REGIONS: pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_MAP_REGIONS status[0x%x]\n", __func__, payload1[1]); q6core_lcl.bus_bw_resp_received = 1; wake_up(&q6core_lcl.bus_bw_req_wait); break; case AVCS_CMD_REGISTER_TOPOLOGIES: pr_debug("%s: Cmd = AVCS_CMD_REGISTER_TOPOLOGIES status[0x%x]\n", __func__, payload1[1]); /* -ADSP status to match Linux error standard */ q6core_lcl.adsp_status = -payload1[1]; q6core_lcl.bus_bw_resp_received = 1; wake_up(&q6core_lcl.bus_bw_req_wait); break; case AVCS_CMD_DEREGISTER_TOPOLOGIES: pr_debug("%s: Cmd = AVCS_CMD_DEREGISTER_TOPOLOGIES status[0x%x]\n", __func__, payload1[1]); q6core_lcl.bus_bw_resp_received = 1; wake_up(&q6core_lcl.bus_bw_req_wait); break; default: pr_err("%s: Invalid cmd rsp[0x%x][0x%x] opcode %d\n", __func__, Loading @@ -101,7 +135,14 @@ static int32_t aprv2_core_fn_q(struct apr_client_data *data, void *priv) q6core_lcl.core_handle_q = NULL; break; } case AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS: payload1 = data->payload; pr_debug("%s: AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS handle %d\n", __func__, payload1[0]); q6core_lcl.mem_map_cal_handle = payload1[0]; q6core_lcl.bus_bw_resp_received = 1; wake_up(&q6core_lcl.bus_bw_req_wait); break; case AVCS_CMDRSP_ADSP_EVENT_GET_STATE: payload1 = data->payload; q6core_lcl.param = payload1[0]; Loading Loading @@ -162,15 +203,17 @@ int32_t core_set_license(uint32_t key, uint32_t module_id) pr_debug("%s: key:0x%x, id:0x%x\n", __func__, key, module_id); mutex_lock(&(q6core_lcl.cmd_lock)); if (q6core_lcl.cal_data == NULL) { if (q6core_lcl.cal_data[META_CAL] == NULL) { pr_err("%s: cal_data not initialized yet!!\n", __func__); rc = -EINVAL; goto cmd_unlock; } mutex_lock(&((q6core_lcl.cal_data)->lock)); cal_block = cal_utils_get_only_cal_block(q6core_lcl.cal_data); if (cal_block == NULL || cal_block->cal_data.kvaddr == NULL || mutex_lock(&((q6core_lcl.cal_data[META_CAL])->lock)); cal_block = cal_utils_get_only_cal_block(q6core_lcl.cal_data[META_CAL]); if (cal_block == NULL || cal_block->cal_data.kvaddr == NULL || cal_block->cal_data.size <= 0) { pr_err("%s: Invalid cal block to send", __func__); rc = -EINVAL; Loading Loading @@ -223,7 +266,8 @@ int32_t core_set_license(uint32_t key, uint32_t module_id) cmd_setl->overwrite = 1; cmd_setl->size = cal_block->cal_data.size; memcpy((uint8_t *)cmd_setl + sizeof(struct avcs_cmd_set_license), cal_block->cal_data.kvaddr, cal_block->cal_data.size); cal_block->cal_data.kvaddr, cal_block->cal_data.size); pr_info("%s: Set license opcode=0x%x ,key=0x%x, id =0x%x, size = %d\n", __func__, cmd_setl->hdr.opcode, metainfo->nKey, cmd_setl->id, cmd_setl->size); Loading @@ -235,7 +279,7 @@ int32_t core_set_license(uint32_t key, uint32_t module_id) fail_cmd: kfree(cmd_setl); cal_data_unlock: mutex_unlock(&((q6core_lcl.cal_data)->lock)); mutex_unlock(&((q6core_lcl.cal_data[META_CAL])->lock)); cmd_unlock: mutex_unlock(&(q6core_lcl.cmd_lock)); Loading Loading @@ -474,36 +518,366 @@ bail: return ret; } static int q6core_map_memory_regions(phys_addr_t *buf_add, uint32_t mempool_id, uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle) { struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL; struct avs_shared_map_region_payload *mregions = NULL; void *mmap_region_cmd = NULL; void *payload = NULL; int ret = 0; int i = 0; int cmd_size = 0; cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions) + sizeof(struct avs_shared_map_region_payload) * bufcnt; mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL); if (mmap_region_cmd == NULL) return -ENOMEM; mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd; mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER); mmap_regions->hdr.pkt_size = cmd_size; mmap_regions->hdr.src_port = 0; mmap_regions->hdr.dest_port = 0; mmap_regions->hdr.token = 0; mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS; mmap_regions->mem_pool_id = ADSP_MEMORY_MAP_SHMEM8_4K_POOL & 0x00ff; mmap_regions->num_regions = bufcnt & 0x00ff; mmap_regions->property_flag = 0x00; payload = ((u8 *) mmap_region_cmd + sizeof(struct avs_cmd_shared_mem_map_regions)); mregions = (struct avs_shared_map_region_payload *)payload; for (i = 0; i < bufcnt; i++) { mregions->shm_addr_lsw = lower_32_bits(buf_add[i]); mregions->shm_addr_msw = upper_32_bits(buf_add[i]); mregions->mem_size_bytes = bufsz[i]; ++mregions; } pr_debug("%s: sending memory map, addr %pa, size %d, bufcnt = %d\n", __func__, buf_add, bufsz[0], mmap_regions->num_regions); *map_handle = 0; q6core_lcl.bus_bw_resp_received = 0; ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) mmap_regions); if (ret < 0) { pr_err("%s: mmap regions failed %d\n", __func__, ret); ret = -EINVAL; goto done; } ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait, (q6core_lcl.bus_bw_resp_received == 1), msecs_to_jiffies(TIMEOUT_MS)); if (!ret) { pr_err("%s: timeout. waited for memory map\n", __func__); ret = -ETIME; goto done; } *map_handle = q6core_lcl.mem_map_cal_handle; done: kfree(mmap_region_cmd); return ret; } static int q6core_memory_unmap_regions(uint32_t mem_map_handle) { struct avs_cmd_shared_mem_unmap_regions unmap_regions; int ret = 0; memset(&unmap_regions, 0, sizeof(unmap_regions)); unmap_regions.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER); unmap_regions.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE, sizeof(unmap_regions)); unmap_regions.hdr.src_svc = APR_SVC_ADSP_CORE; unmap_regions.hdr.src_domain = APR_DOMAIN_APPS; unmap_regions.hdr.src_port = 0; unmap_regions.hdr.dest_svc = APR_SVC_ADSP_CORE; unmap_regions.hdr.dest_domain = APR_DOMAIN_ADSP; unmap_regions.hdr.dest_port = 0; unmap_regions.hdr.token = 0; unmap_regions.hdr.opcode = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS; unmap_regions.mem_map_handle = mem_map_handle; q6core_lcl.bus_bw_resp_received = 0; pr_debug("%s: unmap regions map handle %d\n", __func__, mem_map_handle); ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &unmap_regions); if (ret < 0) { pr_err("%s: unmap regions failed %d\n", __func__, ret); ret = -EINVAL; goto done; } ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait, (q6core_lcl.bus_bw_resp_received == 1), msecs_to_jiffies(TIMEOUT_MS)); if (!ret) { pr_err("%s: timeout. waited for memory_unmap\n", __func__); ret = -ETIME; goto done; } done: return ret; } static int q6core_dereg_all_custom_topologies(void) { int ret = 0; struct avcs_cmd_deregister_topologies dereg_top; memset(&dereg_top, 0, sizeof(dereg_top)); dereg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER); dereg_top.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE, sizeof(dereg_top)); dereg_top.hdr.src_svc = APR_SVC_ADSP_CORE; dereg_top.hdr.src_domain = APR_DOMAIN_APPS; dereg_top.hdr.src_port = 0; dereg_top.hdr.dest_svc = APR_SVC_ADSP_CORE; dereg_top.hdr.dest_domain = APR_DOMAIN_ADSP; dereg_top.hdr.dest_port = 0; dereg_top.hdr.token = 0; dereg_top.hdr.opcode = AVCS_CMD_DEREGISTER_TOPOLOGIES; dereg_top.payload_addr_lsw = 0; dereg_top.payload_addr_msw = 0; dereg_top.mem_map_handle = 0; dereg_top.payload_size = 0; dereg_top.mode = AVCS_MODE_DEREGISTER_ALL_CUSTOM_TOPOLOGIES; q6core_lcl.bus_bw_resp_received = 0; pr_debug("%s: Deregister topologies mode %d\n", __func__, dereg_top.mode); ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &dereg_top); if (ret < 0) { pr_err("%s: Deregister topologies failed %d\n", __func__, ret); goto done; } ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait, (q6core_lcl.bus_bw_resp_received == 1), msecs_to_jiffies(TIMEOUT_MS)); if (!ret) { pr_err("%s: wait_event timeout for Deregister topologies\n", __func__); goto done; } done: return ret; } static int q6core_send_custom_topologies(void) { int ret = 0; int ret2 = 0; struct cal_block_data *cal_block = NULL; struct avcs_cmd_register_topologies reg_top; memset(®_top, 0, sizeof(reg_top)); mutex_lock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock); mutex_lock(&q6core_lcl.cmd_lock); cal_block = cal_utils_get_only_cal_block( q6core_lcl.cal_data[CUST_TOP_CAL]); if (cal_block == NULL) { pr_debug("%s: cal block is NULL!\n", __func__); goto unlock; } if (cal_block->cal_data.size <= 0) { pr_debug("%s: cal size is %zd not sending\n", __func__, cal_block->cal_data.size); goto unlock; } if (!q6core_is_adsp_ready()) { pr_err("%s: ADSP is not ready!\n", __func__); ret = -ENODEV; goto unlock; } q6core_dereg_all_custom_topologies(); ret = q6core_map_memory_regions(&cal_block->cal_data.paddr, 0, (uint32_t *)&cal_block->map_data.map_size, 1, &cal_block->map_data.q6map_handle); if (!ret) { pr_err("%s: q6core_map_memory_regions failed\n", __func__); goto unlock; } reg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER); reg_top.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE, sizeof(reg_top)); reg_top.hdr.src_svc = APR_SVC_ADSP_CORE; reg_top.hdr.src_domain = APR_DOMAIN_APPS; reg_top.hdr.src_port = 0; reg_top.hdr.dest_svc = APR_SVC_ADSP_CORE; reg_top.hdr.dest_domain = APR_DOMAIN_ADSP; reg_top.hdr.dest_port = 0; reg_top.hdr.token = 0; reg_top.hdr.opcode = AVCS_CMD_REGISTER_TOPOLOGIES; reg_top.payload_addr_lsw = lower_32_bits(cal_block->cal_data.paddr); reg_top.payload_addr_msw = upper_32_bits(cal_block->cal_data.paddr); reg_top.mem_map_handle = cal_block->map_data.q6map_handle; reg_top.payload_size = cal_block->cal_data.size; q6core_lcl.adsp_status = 0; q6core_lcl.bus_bw_resp_received = 0; pr_debug("%s: Register topologies addr %pa, size %zd, map handle %d\n", __func__, &cal_block->cal_data.paddr, cal_block->cal_data.size, cal_block->map_data.q6map_handle); ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) ®_top); if (ret < 0) { pr_err("%s: Register topologies failed %d\n", __func__, ret); goto unmap; } ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait, (q6core_lcl.bus_bw_resp_received == 1), msecs_to_jiffies(TIMEOUT_MS)); if (!ret) { pr_err("%s: wait_event timeout for Register topologies\n", __func__); goto unmap; } if (q6core_lcl.adsp_status < 0) ret = q6core_lcl.adsp_status; unmap: ret2 = q6core_memory_unmap_regions(cal_block->map_data.q6map_handle); if (!ret2) { pr_err("%s: q6core_memory_unmap_regions failed for map handle %d\n", __func__, cal_block->map_data.q6map_handle); ret = ret2; goto unlock; } unlock: mutex_unlock(&q6core_lcl.cmd_lock); mutex_unlock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock); return ret; } static int get_cal_type_index(int32_t cal_type) { int ret = -EINVAL; switch (cal_type) { case AUDIO_CORE_METAINFO_CAL_TYPE: ret = META_CAL; break; case CORE_CUSTOM_TOPOLOGIES_CAL_TYPE: ret = CUST_TOP_CAL; break; default: pr_err("%s: invalid cal type %d!\n", __func__, cal_type); } return ret; } static int q6core_alloc_cal(int32_t cal_type, size_t data_size, void *data) { int ret = cal_utils_alloc_cal(data_size, data, q6core_lcl.cal_data, 0, NULL); if (ret < 0) int ret = 0; int cal_index; cal_index = get_cal_type_index(cal_type); if (cal_index < 0) { pr_err("%s: could not get cal index %d!\n", __func__, cal_index); ret = -EINVAL; goto done; } ret = cal_utils_alloc_cal(data_size, data, q6core_lcl.cal_data[cal_index], 0, NULL); if (ret < 0) { pr_err("%s: cal_utils_alloc_block failed, ret = %d, cal type = %d!\n", __func__, ret, cal_type); goto done; } done: return ret; } static int q6core_dealloc_cal(int32_t cal_type, size_t data_size, void *data) { int ret = cal_utils_dealloc_cal(data_size, data, q6core_lcl.cal_data); if (ret < 0) int ret = 0; int cal_index; cal_index = get_cal_type_index(cal_type); if (cal_index < 0) { pr_err("%s: could not get cal index %d!\n", __func__, cal_index); ret = -EINVAL; goto done; } ret = cal_utils_dealloc_cal(data_size, data, q6core_lcl.cal_data[cal_index]); if (ret < 0) { pr_err("%s: cal_utils_dealloc_block failed, ret = %d, cal type = %d!\n", __func__, ret, cal_type); goto done; } done: return ret; } static int q6core_set_cal(int32_t cal_type, size_t data_size, void *data) { int ret = cal_utils_set_cal(data_size, data, q6core_lcl.cal_data, 0, NULL); if (ret < 0) int ret = 0; int cal_index; cal_index = get_cal_type_index(cal_type); if (cal_index < 0) { pr_err("%s: could not get cal index %d!\n", __func__, cal_index); ret = -EINVAL; goto done; } ret = cal_utils_set_cal(data_size, data, q6core_lcl.cal_data[cal_index], 0, NULL); if (ret < 0) { pr_err("%s: cal_utils_set_cal failed, ret = %d, cal type = %d!\n", __func__, ret, cal_type); goto done; } if (cal_index == CUST_TOP_CAL) ret = q6core_send_custom_topologies(); done: return ret; } Loading @@ -511,23 +885,29 @@ static void q6core_delete_cal_data(void) { pr_debug("%s:\n", __func__); cal_utils_destroy_cal_types(1, &q6core_lcl.cal_data); cal_utils_destroy_cal_types(CORE_MAX_CAL, q6core_lcl.cal_data); return; } static int q6core_init_cal_data(void) { int ret = 0; struct cal_type_info cal_type_info = { {AUDIO_CORE_METAINFO_CAL_TYPE, struct cal_type_info cal_type_info[] = { {{AUDIO_CORE_METAINFO_CAL_TYPE, {q6core_alloc_cal, q6core_dealloc_cal, NULL, q6core_set_cal, NULL, NULL} }, {NULL, NULL, cal_utils_match_buf_num} }, {{CORE_CUSTOM_TOPOLOGIES_CAL_TYPE, {q6core_alloc_cal, q6core_dealloc_cal, NULL, q6core_set_cal, NULL, NULL} }, {NULL, NULL, cal_utils_match_buf_num} {NULL, NULL, cal_utils_match_buf_num} } }; pr_debug("%s:\n", __func__); ret = cal_utils_create_cal_types(1, &q6core_lcl.cal_data, &cal_type_info); ret = cal_utils_create_cal_types(CORE_MAX_CAL, q6core_lcl.cal_data, cal_type_info); if (ret < 0) { pr_err("%s: could not create cal type!\n", __func__); Loading @@ -550,6 +930,8 @@ static int __init core_init(void) init_waitqueue_head(&q6core_lcl.cmd_req_wait); q6core_lcl.cmd_resp_received_flag = FLAG_NONE; mutex_init(&q6core_lcl.cmd_lock); q6core_lcl.mem_map_cal_handle = 0; q6core_lcl.adsp_status = 0; q6core_init_cal_data(); return 0; Loading Loading
include/sound/q6core.h +71 −0 Original line number Diff line number Diff line Loading @@ -79,6 +79,77 @@ struct avcs_cmdrsp_get_license_validation_result { /* Length in bytes of the result that follows this structure*/ }; /* Set Q6 topologies */ /* * Registers custom topologies in the aDSP for * use in audio, voice, AFE and LSM. */ #define AVCS_CMD_SHARED_MEM_MAP_REGIONS 0x00012924 #define AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS 0x00012925 #define AVCS_CMD_SHARED_MEM_UNMAP_REGIONS 0x00012926 #define AVCS_CMD_REGISTER_TOPOLOGIES 0x00012923 /* The payload for the AVCS_CMD_REGISTER_TOPOLOGIES command */ struct avcs_cmd_register_topologies { struct apr_hdr hdr; uint32_t payload_addr_lsw; /* Lower 32 bits of the topology buffer address. */ uint32_t payload_addr_msw; /* Upper 32 bits of the topology buffer address. */ uint32_t mem_map_handle; /* Unique identifier for an address. * -This memory map handle is returned by the aDSP through the * memory map command. * -NULL mem_map_handle is interpreted as in-band parameter * passing. * -Client has the flexibility to choose in-band or out-of-band. * -Out-of-band is recommended in this case. */ uint32_t payload_size; /* Size in bytes of the valid data in the topology buffer. */ } __packed; #define AVCS_CMD_DEREGISTER_TOPOLOGIES 0x0001292a /* The payload for the AVCS_CMD_DEREGISTER_TOPOLOGIES command */ struct avcs_cmd_deregister_topologies { struct apr_hdr hdr; uint32_t payload_addr_lsw; /* Lower 32 bits of the topology buffer address. */ uint32_t payload_addr_msw; /* Upper 32 bits of the topology buffer address. */ uint32_t mem_map_handle; /* Unique identifier for an address. * -This memory map handle is returned by the aDSP through the * memory map command. * -NULL mem_map_handle is interpreted as in-band parameter * passing. * -Client has the flexibility to choose in-band or out-of-band. * -Out-of-band is recommended in this case. */ uint32_t payload_size; /* Size in bytes of the valid data in the topology buffer. */ uint32_t mode; /* 0: Deregister selected topologies * 1: Deregister all topologies */ } __packed; #define AVCS_MODE_DEREGISTER_ALL_CUSTOM_TOPOLOGIES 1 int32_t core_set_license(uint32_t key, uint32_t module_id); int32_t core_get_license_status(uint32_t module_id); Loading
include/uapi/linux/msm_audio_calibration.h +2 −0 Original line number Diff line number Diff line Loading @@ -91,6 +91,8 @@ enum { DTS_EAGLE_CAL_TYPE, AUDIO_CORE_METAINFO_CAL_TYPE, SRS_TRUMEDIA_CAL_TYPE, CORE_CUSTOM_TOPOLOGIES_CAL_TYPE, MAX_CAL_TYPES, }; Loading
sound/soc/msm/qdsp6v2/audio_cal_utils.c +2 −0 Original line number Diff line number Diff line Loading @@ -55,6 +55,7 @@ size_t get_cal_info_size(int32_t cal_type) size = sizeof(struct audio_cal_info_adm_top); break; case ADM_CUST_TOPOLOGY_CAL_TYPE: case CORE_CUSTOM_TOPOLOGIES_CAL_TYPE: size = 0; break; case ADM_AUDPROC_CAL_TYPE: Loading Loading @@ -180,6 +181,7 @@ size_t get_user_cal_type_size(int32_t cal_type) size = sizeof(struct audio_cal_type_adm_top); break; case ADM_CUST_TOPOLOGY_CAL_TYPE: case CORE_CUSTOM_TOPOLOGIES_CAL_TYPE: size = sizeof(struct audio_cal_type_basic); break; case ADM_AUDPROC_CAL_TYPE: Loading
sound/soc/msm/qdsp6v2/q6core.c +407 −25 Original line number Diff line number Diff line Loading @@ -31,6 +31,12 @@ */ #define Q6_READY_TIMEOUT_MS 100 enum { META_CAL, CUST_TOP_CAL, CORE_MAX_CAL }; struct q6core_str { struct apr_svc *core_handle_q; wait_queue_head_t bus_bw_req_wait; Loading @@ -46,7 +52,9 @@ struct q6core_str { cmdrsp_license_result; } cmd_resp_payload; u32 param; struct cal_type_data *cal_data; struct cal_type_data *cal_data[CORE_MAX_CAL]; uint32_t mem_map_cal_handle; int32_t adsp_status; }; static struct q6core_str q6core_lcl; Loading Loading @@ -85,6 +93,32 @@ static int32_t aprv2_core_fn_q(struct apr_client_data *data, void *priv) switch (payload1[0]) { case AVCS_CMD_SHARED_MEM_UNMAP_REGIONS: pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS status[0x%x]\n", __func__, payload1[1]); q6core_lcl.bus_bw_resp_received = 1; wake_up(&q6core_lcl.bus_bw_req_wait); break; case AVCS_CMD_SHARED_MEM_MAP_REGIONS: pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_MAP_REGIONS status[0x%x]\n", __func__, payload1[1]); q6core_lcl.bus_bw_resp_received = 1; wake_up(&q6core_lcl.bus_bw_req_wait); break; case AVCS_CMD_REGISTER_TOPOLOGIES: pr_debug("%s: Cmd = AVCS_CMD_REGISTER_TOPOLOGIES status[0x%x]\n", __func__, payload1[1]); /* -ADSP status to match Linux error standard */ q6core_lcl.adsp_status = -payload1[1]; q6core_lcl.bus_bw_resp_received = 1; wake_up(&q6core_lcl.bus_bw_req_wait); break; case AVCS_CMD_DEREGISTER_TOPOLOGIES: pr_debug("%s: Cmd = AVCS_CMD_DEREGISTER_TOPOLOGIES status[0x%x]\n", __func__, payload1[1]); q6core_lcl.bus_bw_resp_received = 1; wake_up(&q6core_lcl.bus_bw_req_wait); break; default: pr_err("%s: Invalid cmd rsp[0x%x][0x%x] opcode %d\n", __func__, Loading @@ -101,7 +135,14 @@ static int32_t aprv2_core_fn_q(struct apr_client_data *data, void *priv) q6core_lcl.core_handle_q = NULL; break; } case AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS: payload1 = data->payload; pr_debug("%s: AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS handle %d\n", __func__, payload1[0]); q6core_lcl.mem_map_cal_handle = payload1[0]; q6core_lcl.bus_bw_resp_received = 1; wake_up(&q6core_lcl.bus_bw_req_wait); break; case AVCS_CMDRSP_ADSP_EVENT_GET_STATE: payload1 = data->payload; q6core_lcl.param = payload1[0]; Loading Loading @@ -162,15 +203,17 @@ int32_t core_set_license(uint32_t key, uint32_t module_id) pr_debug("%s: key:0x%x, id:0x%x\n", __func__, key, module_id); mutex_lock(&(q6core_lcl.cmd_lock)); if (q6core_lcl.cal_data == NULL) { if (q6core_lcl.cal_data[META_CAL] == NULL) { pr_err("%s: cal_data not initialized yet!!\n", __func__); rc = -EINVAL; goto cmd_unlock; } mutex_lock(&((q6core_lcl.cal_data)->lock)); cal_block = cal_utils_get_only_cal_block(q6core_lcl.cal_data); if (cal_block == NULL || cal_block->cal_data.kvaddr == NULL || mutex_lock(&((q6core_lcl.cal_data[META_CAL])->lock)); cal_block = cal_utils_get_only_cal_block(q6core_lcl.cal_data[META_CAL]); if (cal_block == NULL || cal_block->cal_data.kvaddr == NULL || cal_block->cal_data.size <= 0) { pr_err("%s: Invalid cal block to send", __func__); rc = -EINVAL; Loading Loading @@ -223,7 +266,8 @@ int32_t core_set_license(uint32_t key, uint32_t module_id) cmd_setl->overwrite = 1; cmd_setl->size = cal_block->cal_data.size; memcpy((uint8_t *)cmd_setl + sizeof(struct avcs_cmd_set_license), cal_block->cal_data.kvaddr, cal_block->cal_data.size); cal_block->cal_data.kvaddr, cal_block->cal_data.size); pr_info("%s: Set license opcode=0x%x ,key=0x%x, id =0x%x, size = %d\n", __func__, cmd_setl->hdr.opcode, metainfo->nKey, cmd_setl->id, cmd_setl->size); Loading @@ -235,7 +279,7 @@ int32_t core_set_license(uint32_t key, uint32_t module_id) fail_cmd: kfree(cmd_setl); cal_data_unlock: mutex_unlock(&((q6core_lcl.cal_data)->lock)); mutex_unlock(&((q6core_lcl.cal_data[META_CAL])->lock)); cmd_unlock: mutex_unlock(&(q6core_lcl.cmd_lock)); Loading Loading @@ -474,36 +518,366 @@ bail: return ret; } static int q6core_map_memory_regions(phys_addr_t *buf_add, uint32_t mempool_id, uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle) { struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL; struct avs_shared_map_region_payload *mregions = NULL; void *mmap_region_cmd = NULL; void *payload = NULL; int ret = 0; int i = 0; int cmd_size = 0; cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions) + sizeof(struct avs_shared_map_region_payload) * bufcnt; mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL); if (mmap_region_cmd == NULL) return -ENOMEM; mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd; mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER); mmap_regions->hdr.pkt_size = cmd_size; mmap_regions->hdr.src_port = 0; mmap_regions->hdr.dest_port = 0; mmap_regions->hdr.token = 0; mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS; mmap_regions->mem_pool_id = ADSP_MEMORY_MAP_SHMEM8_4K_POOL & 0x00ff; mmap_regions->num_regions = bufcnt & 0x00ff; mmap_regions->property_flag = 0x00; payload = ((u8 *) mmap_region_cmd + sizeof(struct avs_cmd_shared_mem_map_regions)); mregions = (struct avs_shared_map_region_payload *)payload; for (i = 0; i < bufcnt; i++) { mregions->shm_addr_lsw = lower_32_bits(buf_add[i]); mregions->shm_addr_msw = upper_32_bits(buf_add[i]); mregions->mem_size_bytes = bufsz[i]; ++mregions; } pr_debug("%s: sending memory map, addr %pa, size %d, bufcnt = %d\n", __func__, buf_add, bufsz[0], mmap_regions->num_regions); *map_handle = 0; q6core_lcl.bus_bw_resp_received = 0; ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) mmap_regions); if (ret < 0) { pr_err("%s: mmap regions failed %d\n", __func__, ret); ret = -EINVAL; goto done; } ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait, (q6core_lcl.bus_bw_resp_received == 1), msecs_to_jiffies(TIMEOUT_MS)); if (!ret) { pr_err("%s: timeout. waited for memory map\n", __func__); ret = -ETIME; goto done; } *map_handle = q6core_lcl.mem_map_cal_handle; done: kfree(mmap_region_cmd); return ret; } static int q6core_memory_unmap_regions(uint32_t mem_map_handle) { struct avs_cmd_shared_mem_unmap_regions unmap_regions; int ret = 0; memset(&unmap_regions, 0, sizeof(unmap_regions)); unmap_regions.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER); unmap_regions.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE, sizeof(unmap_regions)); unmap_regions.hdr.src_svc = APR_SVC_ADSP_CORE; unmap_regions.hdr.src_domain = APR_DOMAIN_APPS; unmap_regions.hdr.src_port = 0; unmap_regions.hdr.dest_svc = APR_SVC_ADSP_CORE; unmap_regions.hdr.dest_domain = APR_DOMAIN_ADSP; unmap_regions.hdr.dest_port = 0; unmap_regions.hdr.token = 0; unmap_regions.hdr.opcode = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS; unmap_regions.mem_map_handle = mem_map_handle; q6core_lcl.bus_bw_resp_received = 0; pr_debug("%s: unmap regions map handle %d\n", __func__, mem_map_handle); ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &unmap_regions); if (ret < 0) { pr_err("%s: unmap regions failed %d\n", __func__, ret); ret = -EINVAL; goto done; } ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait, (q6core_lcl.bus_bw_resp_received == 1), msecs_to_jiffies(TIMEOUT_MS)); if (!ret) { pr_err("%s: timeout. waited for memory_unmap\n", __func__); ret = -ETIME; goto done; } done: return ret; } static int q6core_dereg_all_custom_topologies(void) { int ret = 0; struct avcs_cmd_deregister_topologies dereg_top; memset(&dereg_top, 0, sizeof(dereg_top)); dereg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER); dereg_top.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE, sizeof(dereg_top)); dereg_top.hdr.src_svc = APR_SVC_ADSP_CORE; dereg_top.hdr.src_domain = APR_DOMAIN_APPS; dereg_top.hdr.src_port = 0; dereg_top.hdr.dest_svc = APR_SVC_ADSP_CORE; dereg_top.hdr.dest_domain = APR_DOMAIN_ADSP; dereg_top.hdr.dest_port = 0; dereg_top.hdr.token = 0; dereg_top.hdr.opcode = AVCS_CMD_DEREGISTER_TOPOLOGIES; dereg_top.payload_addr_lsw = 0; dereg_top.payload_addr_msw = 0; dereg_top.mem_map_handle = 0; dereg_top.payload_size = 0; dereg_top.mode = AVCS_MODE_DEREGISTER_ALL_CUSTOM_TOPOLOGIES; q6core_lcl.bus_bw_resp_received = 0; pr_debug("%s: Deregister topologies mode %d\n", __func__, dereg_top.mode); ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &dereg_top); if (ret < 0) { pr_err("%s: Deregister topologies failed %d\n", __func__, ret); goto done; } ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait, (q6core_lcl.bus_bw_resp_received == 1), msecs_to_jiffies(TIMEOUT_MS)); if (!ret) { pr_err("%s: wait_event timeout for Deregister topologies\n", __func__); goto done; } done: return ret; } static int q6core_send_custom_topologies(void) { int ret = 0; int ret2 = 0; struct cal_block_data *cal_block = NULL; struct avcs_cmd_register_topologies reg_top; memset(®_top, 0, sizeof(reg_top)); mutex_lock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock); mutex_lock(&q6core_lcl.cmd_lock); cal_block = cal_utils_get_only_cal_block( q6core_lcl.cal_data[CUST_TOP_CAL]); if (cal_block == NULL) { pr_debug("%s: cal block is NULL!\n", __func__); goto unlock; } if (cal_block->cal_data.size <= 0) { pr_debug("%s: cal size is %zd not sending\n", __func__, cal_block->cal_data.size); goto unlock; } if (!q6core_is_adsp_ready()) { pr_err("%s: ADSP is not ready!\n", __func__); ret = -ENODEV; goto unlock; } q6core_dereg_all_custom_topologies(); ret = q6core_map_memory_regions(&cal_block->cal_data.paddr, 0, (uint32_t *)&cal_block->map_data.map_size, 1, &cal_block->map_data.q6map_handle); if (!ret) { pr_err("%s: q6core_map_memory_regions failed\n", __func__); goto unlock; } reg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER); reg_top.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE, sizeof(reg_top)); reg_top.hdr.src_svc = APR_SVC_ADSP_CORE; reg_top.hdr.src_domain = APR_DOMAIN_APPS; reg_top.hdr.src_port = 0; reg_top.hdr.dest_svc = APR_SVC_ADSP_CORE; reg_top.hdr.dest_domain = APR_DOMAIN_ADSP; reg_top.hdr.dest_port = 0; reg_top.hdr.token = 0; reg_top.hdr.opcode = AVCS_CMD_REGISTER_TOPOLOGIES; reg_top.payload_addr_lsw = lower_32_bits(cal_block->cal_data.paddr); reg_top.payload_addr_msw = upper_32_bits(cal_block->cal_data.paddr); reg_top.mem_map_handle = cal_block->map_data.q6map_handle; reg_top.payload_size = cal_block->cal_data.size; q6core_lcl.adsp_status = 0; q6core_lcl.bus_bw_resp_received = 0; pr_debug("%s: Register topologies addr %pa, size %zd, map handle %d\n", __func__, &cal_block->cal_data.paddr, cal_block->cal_data.size, cal_block->map_data.q6map_handle); ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) ®_top); if (ret < 0) { pr_err("%s: Register topologies failed %d\n", __func__, ret); goto unmap; } ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait, (q6core_lcl.bus_bw_resp_received == 1), msecs_to_jiffies(TIMEOUT_MS)); if (!ret) { pr_err("%s: wait_event timeout for Register topologies\n", __func__); goto unmap; } if (q6core_lcl.adsp_status < 0) ret = q6core_lcl.adsp_status; unmap: ret2 = q6core_memory_unmap_regions(cal_block->map_data.q6map_handle); if (!ret2) { pr_err("%s: q6core_memory_unmap_regions failed for map handle %d\n", __func__, cal_block->map_data.q6map_handle); ret = ret2; goto unlock; } unlock: mutex_unlock(&q6core_lcl.cmd_lock); mutex_unlock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock); return ret; } static int get_cal_type_index(int32_t cal_type) { int ret = -EINVAL; switch (cal_type) { case AUDIO_CORE_METAINFO_CAL_TYPE: ret = META_CAL; break; case CORE_CUSTOM_TOPOLOGIES_CAL_TYPE: ret = CUST_TOP_CAL; break; default: pr_err("%s: invalid cal type %d!\n", __func__, cal_type); } return ret; } static int q6core_alloc_cal(int32_t cal_type, size_t data_size, void *data) { int ret = cal_utils_alloc_cal(data_size, data, q6core_lcl.cal_data, 0, NULL); if (ret < 0) int ret = 0; int cal_index; cal_index = get_cal_type_index(cal_type); if (cal_index < 0) { pr_err("%s: could not get cal index %d!\n", __func__, cal_index); ret = -EINVAL; goto done; } ret = cal_utils_alloc_cal(data_size, data, q6core_lcl.cal_data[cal_index], 0, NULL); if (ret < 0) { pr_err("%s: cal_utils_alloc_block failed, ret = %d, cal type = %d!\n", __func__, ret, cal_type); goto done; } done: return ret; } static int q6core_dealloc_cal(int32_t cal_type, size_t data_size, void *data) { int ret = cal_utils_dealloc_cal(data_size, data, q6core_lcl.cal_data); if (ret < 0) int ret = 0; int cal_index; cal_index = get_cal_type_index(cal_type); if (cal_index < 0) { pr_err("%s: could not get cal index %d!\n", __func__, cal_index); ret = -EINVAL; goto done; } ret = cal_utils_dealloc_cal(data_size, data, q6core_lcl.cal_data[cal_index]); if (ret < 0) { pr_err("%s: cal_utils_dealloc_block failed, ret = %d, cal type = %d!\n", __func__, ret, cal_type); goto done; } done: return ret; } static int q6core_set_cal(int32_t cal_type, size_t data_size, void *data) { int ret = cal_utils_set_cal(data_size, data, q6core_lcl.cal_data, 0, NULL); if (ret < 0) int ret = 0; int cal_index; cal_index = get_cal_type_index(cal_type); if (cal_index < 0) { pr_err("%s: could not get cal index %d!\n", __func__, cal_index); ret = -EINVAL; goto done; } ret = cal_utils_set_cal(data_size, data, q6core_lcl.cal_data[cal_index], 0, NULL); if (ret < 0) { pr_err("%s: cal_utils_set_cal failed, ret = %d, cal type = %d!\n", __func__, ret, cal_type); goto done; } if (cal_index == CUST_TOP_CAL) ret = q6core_send_custom_topologies(); done: return ret; } Loading @@ -511,23 +885,29 @@ static void q6core_delete_cal_data(void) { pr_debug("%s:\n", __func__); cal_utils_destroy_cal_types(1, &q6core_lcl.cal_data); cal_utils_destroy_cal_types(CORE_MAX_CAL, q6core_lcl.cal_data); return; } static int q6core_init_cal_data(void) { int ret = 0; struct cal_type_info cal_type_info = { {AUDIO_CORE_METAINFO_CAL_TYPE, struct cal_type_info cal_type_info[] = { {{AUDIO_CORE_METAINFO_CAL_TYPE, {q6core_alloc_cal, q6core_dealloc_cal, NULL, q6core_set_cal, NULL, NULL} }, {NULL, NULL, cal_utils_match_buf_num} }, {{CORE_CUSTOM_TOPOLOGIES_CAL_TYPE, {q6core_alloc_cal, q6core_dealloc_cal, NULL, q6core_set_cal, NULL, NULL} }, {NULL, NULL, cal_utils_match_buf_num} {NULL, NULL, cal_utils_match_buf_num} } }; pr_debug("%s:\n", __func__); ret = cal_utils_create_cal_types(1, &q6core_lcl.cal_data, &cal_type_info); ret = cal_utils_create_cal_types(CORE_MAX_CAL, q6core_lcl.cal_data, cal_type_info); if (ret < 0) { pr_err("%s: could not create cal type!\n", __func__); Loading @@ -550,6 +930,8 @@ static int __init core_init(void) init_waitqueue_head(&q6core_lcl.cmd_req_wait); q6core_lcl.cmd_resp_received_flag = FLAG_NONE; mutex_init(&q6core_lcl.cmd_lock); q6core_lcl.mem_map_cal_handle = 0; q6core_lcl.adsp_status = 0; q6core_init_cal_data(); return 0; Loading