Loading drivers/mtd/chips/Kconfig +27 −2 Original line number Diff line number Diff line # drivers/mtd/chips/Kconfig # $Id: Kconfig,v 1.13 2004/12/01 15:49:10 nico Exp $ # $Id: Kconfig,v 1.15 2005/06/06 23:04:35 tpoynor Exp $ menu "RAM/ROM/Flash chip drivers" depends on MTD!=n Loading Loading @@ -155,6 +155,31 @@ config MTD_CFI_I8 If your flash chips are interleaved in eights - i.e. you have eight flash chips addressed by each bus cycle, then say 'Y'. config MTD_OTP bool "Protection Registers aka one-time programmable (OTP) bits" depends on MTD_CFI_ADV_OPTIONS default n help This enables support for reading, writing and locking so called "Protection Registers" present on some flash chips. A subset of them are pre-programmed at the factory with a unique set of values. The rest is user-programmable. The user-programmable Protection Registers contain one-time programmable (OTP) bits; when programmed, register bits cannot be erased. Each Protection Register can be accessed multiple times to program individual bits, as long as the register remains unlocked. Each Protection Register has an associated Lock Register bit. When a Lock Register bit is programmed, the associated Protection Register can only be read; it can no longer be programmed. Additionally, because the Lock Register bits themselves are OTP, when programmed, Lock Register bits cannot be erased. Therefore, when a Protection Register is locked, it cannot be unlocked. This feature should therefore be used with extreme care. Any mistake in the programming of OTP bits will waste them. config MTD_CFI_INTELEXT tristate "Support for Intel/Sharp flash chips" depends on MTD_GEN_PROBE Loading Loading @@ -275,7 +300,7 @@ config MTD_JEDEC config MTD_XIP bool "XIP aware MTD support" depends on !SMP && MTD_CFI_INTELEXT && EXPERIMENTAL depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && EXPERIMENTAL default y if XIP_KERNEL help This allows MTD support to work with flash memory which is also Loading drivers/mtd/chips/amd_flash.c +1 −13 Original line number Diff line number Diff line Loading @@ -3,7 +3,7 @@ * * Author: Jonas Holmberg <jonas.holmberg@axis.com> * * $Id: amd_flash.c,v 1.26 2004/11/20 12:49:04 dwmw2 Exp $ * $Id: amd_flash.c,v 1.27 2005/02/04 07:43:09 jonashg Exp $ * * Copyright (c) 2001 Axis Communications AB * Loading Loading @@ -67,7 +67,6 @@ #define AM29LV160DT 0x22C4 #define AM29LV160DB 0x2249 #define AM29BDS323D 0x22D1 #define AM29BDS643D 0x227E /* Atmel */ #define AT49xV16x 0x00C0 Loading Loading @@ -617,17 +616,6 @@ static struct mtd_info *amd_flash_probe(struct map_info *map) { .offset = 0x300000, .erasesize = 0x10000, .numblocks = 15 }, { .offset = 0x3f0000, .erasesize = 0x02000, .numblocks = 8 }, } }, { .mfr_id = MANUFACTURER_AMD, .dev_id = AM29BDS643D, .name = "AMD AM29BDS643D", .size = 0x00800000, .numeraseregions = 3, .regions = { { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 96 }, { .offset = 0x600000, .erasesize = 0x10000, .numblocks = 31 }, { .offset = 0x7f0000, .erasesize = 0x02000, .numblocks = 8 }, } }, { .mfr_id = MANUFACTURER_ATMEL, .dev_id = AT49xV16x, Loading Loading
drivers/mtd/chips/Kconfig +27 −2 Original line number Diff line number Diff line # drivers/mtd/chips/Kconfig # $Id: Kconfig,v 1.13 2004/12/01 15:49:10 nico Exp $ # $Id: Kconfig,v 1.15 2005/06/06 23:04:35 tpoynor Exp $ menu "RAM/ROM/Flash chip drivers" depends on MTD!=n Loading Loading @@ -155,6 +155,31 @@ config MTD_CFI_I8 If your flash chips are interleaved in eights - i.e. you have eight flash chips addressed by each bus cycle, then say 'Y'. config MTD_OTP bool "Protection Registers aka one-time programmable (OTP) bits" depends on MTD_CFI_ADV_OPTIONS default n help This enables support for reading, writing and locking so called "Protection Registers" present on some flash chips. A subset of them are pre-programmed at the factory with a unique set of values. The rest is user-programmable. The user-programmable Protection Registers contain one-time programmable (OTP) bits; when programmed, register bits cannot be erased. Each Protection Register can be accessed multiple times to program individual bits, as long as the register remains unlocked. Each Protection Register has an associated Lock Register bit. When a Lock Register bit is programmed, the associated Protection Register can only be read; it can no longer be programmed. Additionally, because the Lock Register bits themselves are OTP, when programmed, Lock Register bits cannot be erased. Therefore, when a Protection Register is locked, it cannot be unlocked. This feature should therefore be used with extreme care. Any mistake in the programming of OTP bits will waste them. config MTD_CFI_INTELEXT tristate "Support for Intel/Sharp flash chips" depends on MTD_GEN_PROBE Loading Loading @@ -275,7 +300,7 @@ config MTD_JEDEC config MTD_XIP bool "XIP aware MTD support" depends on !SMP && MTD_CFI_INTELEXT && EXPERIMENTAL depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && EXPERIMENTAL default y if XIP_KERNEL help This allows MTD support to work with flash memory which is also Loading
drivers/mtd/chips/amd_flash.c +1 −13 Original line number Diff line number Diff line Loading @@ -3,7 +3,7 @@ * * Author: Jonas Holmberg <jonas.holmberg@axis.com> * * $Id: amd_flash.c,v 1.26 2004/11/20 12:49:04 dwmw2 Exp $ * $Id: amd_flash.c,v 1.27 2005/02/04 07:43:09 jonashg Exp $ * * Copyright (c) 2001 Axis Communications AB * Loading Loading @@ -67,7 +67,6 @@ #define AM29LV160DT 0x22C4 #define AM29LV160DB 0x2249 #define AM29BDS323D 0x22D1 #define AM29BDS643D 0x227E /* Atmel */ #define AT49xV16x 0x00C0 Loading Loading @@ -617,17 +616,6 @@ static struct mtd_info *amd_flash_probe(struct map_info *map) { .offset = 0x300000, .erasesize = 0x10000, .numblocks = 15 }, { .offset = 0x3f0000, .erasesize = 0x02000, .numblocks = 8 }, } }, { .mfr_id = MANUFACTURER_AMD, .dev_id = AM29BDS643D, .name = "AMD AM29BDS643D", .size = 0x00800000, .numeraseregions = 3, .regions = { { .offset = 0x000000, .erasesize = 0x10000, .numblocks = 96 }, { .offset = 0x600000, .erasesize = 0x10000, .numblocks = 31 }, { .offset = 0x7f0000, .erasesize = 0x02000, .numblocks = 8 }, } }, { .mfr_id = MANUFACTURER_ATMEL, .dev_id = AT49xV16x, Loading