Loading drivers/serial/bfin_5xx.c +5 −25 Original line number Diff line number Diff line Loading @@ -530,11 +530,7 @@ static unsigned int bfin_serial_get_mctrl(struct uart_port *port) if (uart->cts_pin < 0) return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; # ifdef BF54x if (UART_GET_MSR(uart) & CTS) # else if (gpio_get_value(uart->cts_pin)) # endif if (UART_GET_CTS(uart)) return TIOCM_DSR | TIOCM_CAR; else #endif Loading @@ -549,17 +545,9 @@ static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) return; if (mctrl & TIOCM_RTS) # ifdef BF54x UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS); # else gpio_set_value(uart->rts_pin, 0); # endif UART_CLEAR_RTS(uart); else # ifdef BF54x UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS); # else gpio_set_value(uart->rts_pin, 1); # endif UART_SET_RTS(uart); #endif } Loading Loading @@ -752,11 +740,7 @@ bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios, /* Disable UART */ ier = UART_GET_IER(uart); #ifdef CONFIG_BF54x UART_CLEAR_IER(uart, 0xF); #else UART_PUT_IER(uart, 0); #endif UART_DISABLE_INTS(uart); /* Set DLAB in LCR to Access DLL and DLH */ UART_SET_DLAB(uart); Loading @@ -771,11 +755,7 @@ bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios, UART_PUT_LCR(uart, lcr); /* Enable UART */ #ifdef CONFIG_BF54x UART_SET_IER(uart, ier); #else UART_PUT_IER(uart, ier); #endif UART_ENABLE_INTS(uart, ier); val = UART_GET_GCTL(uart); val |= UCEN; Loading include/asm-blackfin/mach-bf527/bfin_serial_5xx.h +6 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,12 @@ #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) #define UART_GET_CTS(x) gpio_get_value(x->cts_pin) #define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) #define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) # define CONFIG_SERIAL_BFIN_CTSRTS Loading include/asm-blackfin/mach-bf533/bfin_serial_5xx.h +6 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,12 @@ #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) #define UART_GET_CTS(x) gpio_get_value(x->cts_pin) #define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) #define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) #ifdef CONFIG_BFIN_UART0_CTSRTS # define CONFIG_SERIAL_BFIN_CTSRTS # ifndef CONFIG_UART0_CTS_PIN Loading include/asm-blackfin/mach-bf537/bfin_serial_5xx.h +6 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,12 @@ #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) #define UART_GET_CTS(x) gpio_get_value(x->cts_pin) #define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) #define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) # define CONFIG_SERIAL_BFIN_CTSRTS Loading include/asm-blackfin/mach-bf548/bfin_serial_5xx.h +6 −0 Original line number Diff line number Diff line Loading @@ -57,6 +57,12 @@ #define UART_SET_DLAB(uart) /* MMRs not muxed on BF54x */ #define UART_CLEAR_DLAB(uart) /* MMRs not muxed on BF54x */ #define UART_GET_CTS(x) (UART_GET_MSR(x) & CTS) #define UART_SET_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) | MRTS)) #define UART_CLEAR_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) & ~MRTS)) #define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v) #define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF) #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) # define CONFIG_SERIAL_BFIN_CTSRTS Loading Loading
drivers/serial/bfin_5xx.c +5 −25 Original line number Diff line number Diff line Loading @@ -530,11 +530,7 @@ static unsigned int bfin_serial_get_mctrl(struct uart_port *port) if (uart->cts_pin < 0) return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; # ifdef BF54x if (UART_GET_MSR(uart) & CTS) # else if (gpio_get_value(uart->cts_pin)) # endif if (UART_GET_CTS(uart)) return TIOCM_DSR | TIOCM_CAR; else #endif Loading @@ -549,17 +545,9 @@ static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) return; if (mctrl & TIOCM_RTS) # ifdef BF54x UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS); # else gpio_set_value(uart->rts_pin, 0); # endif UART_CLEAR_RTS(uart); else # ifdef BF54x UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS); # else gpio_set_value(uart->rts_pin, 1); # endif UART_SET_RTS(uart); #endif } Loading Loading @@ -752,11 +740,7 @@ bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios, /* Disable UART */ ier = UART_GET_IER(uart); #ifdef CONFIG_BF54x UART_CLEAR_IER(uart, 0xF); #else UART_PUT_IER(uart, 0); #endif UART_DISABLE_INTS(uart); /* Set DLAB in LCR to Access DLL and DLH */ UART_SET_DLAB(uart); Loading @@ -771,11 +755,7 @@ bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios, UART_PUT_LCR(uart, lcr); /* Enable UART */ #ifdef CONFIG_BF54x UART_SET_IER(uart, ier); #else UART_PUT_IER(uart, ier); #endif UART_ENABLE_INTS(uart, ier); val = UART_GET_GCTL(uart); val |= UCEN; Loading
include/asm-blackfin/mach-bf527/bfin_serial_5xx.h +6 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,12 @@ #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) #define UART_GET_CTS(x) gpio_get_value(x->cts_pin) #define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) #define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) # define CONFIG_SERIAL_BFIN_CTSRTS Loading
include/asm-blackfin/mach-bf533/bfin_serial_5xx.h +6 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,12 @@ #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) #define UART_GET_CTS(x) gpio_get_value(x->cts_pin) #define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) #define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) #ifdef CONFIG_BFIN_UART0_CTSRTS # define CONFIG_SERIAL_BFIN_CTSRTS # ifndef CONFIG_UART0_CTS_PIN Loading
include/asm-blackfin/mach-bf537/bfin_serial_5xx.h +6 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,12 @@ #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) #define UART_GET_CTS(x) gpio_get_value(x->cts_pin) #define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1) #define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0) #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) # define CONFIG_SERIAL_BFIN_CTSRTS Loading
include/asm-blackfin/mach-bf548/bfin_serial_5xx.h +6 −0 Original line number Diff line number Diff line Loading @@ -57,6 +57,12 @@ #define UART_SET_DLAB(uart) /* MMRs not muxed on BF54x */ #define UART_CLEAR_DLAB(uart) /* MMRs not muxed on BF54x */ #define UART_GET_CTS(x) (UART_GET_MSR(x) & CTS) #define UART_SET_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) | MRTS)) #define UART_CLEAR_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) & ~MRTS)) #define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v) #define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF) #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) # define CONFIG_SERIAL_BFIN_CTSRTS Loading