Merge "coresight-tmc: add support to set default sink" (1fa97146) · Commits · e / devices / android_kernel_xiaomi_markw

Documentation/devicetree/bindings/arm/coresight.txt

+2 −0

Original line number	Diff line number	Diff line
		@@ -64,6 +64,8 @@ its hardware characteristcs.
		* arm,buffer-size: size of contiguous buffer space for TMC ETR
		(embedded trace router)

		* arm,default-sink: represents the default compile time CoreSight sink

		* Required property for TPDAs:

		* qcom,tpda-atid: must be present. Specifies the ATID for TPDA.

+2 −0

Original line number	Diff line number	Diff line
		@@ -1671,6 +1671,8 @@ static int tmc_probe(struct amba_device adev, const struct amba_id id)
		return -ENOMEM;
		}

		pdata->default_sink = of_property_read_bool(np, "arm,default-sink");

		desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
		if (!desc)
		return -ENOMEM;

+15 −0

Original line number	Diff line number	Diff line
		@@ -795,6 +795,21 @@ struct coresight_device coresight_register(struct coresight_desc desc)
		coresight_fixup_device_conns(csdev);
		coresight_fixup_orphan_conns(csdev);

		if (csdev->type == CORESIGHT_DEV_TYPE_SINK \|\|
		csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) {
		if (desc->pdata->default_sink) {
		if (curr_sink) {
		dev_warn(&csdev->dev,
		"overwritting curr sink %s",
		dev_name(&curr_sink->dev));
		curr_sink->activated = false;
		}

		curr_sink = csdev;
		curr_sink->activated = true;
		}
		}

		mutex_unlock(&coresight_mutex);

		return csdev;

+2 −0

Original line number	Diff line number	Diff line
		@@ -105,6 +105,7 @@ struct coresight_dev_subtype {
		connected to.
		* @nr_outport: number of output ports for this component.
		* @clk: The clock this component is associated to.
		* @default_sink: Flag to set default sink
		*/
		struct coresight_platform_data {
		int cpu;
		@@ -115,6 +116,7 @@ struct coresight_platform_data {
		int *child_ports;
		int nr_outport;
		struct clk *clk;
		bool default_sink;
		};

		/**