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Commit 1ede7dcc authored by Bryan O'Donoghue's avatar Bryan O'Donoghue Committed by Greg Kroah-Hartman
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serial: 8250: Add Quark X1000 to 8250_pci.c 



Quark X1000 contains two designware derived 8250 serial ports.
Each port has a unique PCI configuration space consisting of
BAR0:UART BAR1:DMA respectively.

Unlike the standard 8250 the register width is 32 bits for RHR,IER etc
The Quark UART has a fundamental clock @ 44.2368 MHz allowing for a
bitrate of up to about 2.76 megabits per second.

This patch enables standard 8250 mode

Signed-off-by: default avatarBryan O'Donoghue <pure.logic@nexus-software.ie>
Reviewed-by: default avatarHeikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 13d6ceb4

drivers/tty/serial/8250/8250_pci.c

+21 −0
Original line number Diff line number Diff line
@@ -1788,6 +1788,7 @@ pci_wch_ch353_setup(struct serial_private *priv, 
#define PCI_DEVICE_ID_COMMTECH_4222PCIE	0x0022

#define PCI_DEVICE_ID_BROADCOM_TRUMANAGE 0x160a

#define PCI_DEVICE_ID_AMCC_ADDIDATA_APCI7800 0x818e

#define PCI_DEVICE_ID_INTEL_QRK_UART	0x0936



#define PCI_VENDOR_ID_SUNIX		0x1fd4

#define PCI_DEVICE_ID_SUNIX_1999	0x1999
@@ -1898,6 +1899,13 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { 
		.subdevice	= PCI_ANY_ID,

		.setup		= byt_serial_setup,

	},

	{

		.vendor		= PCI_VENDOR_ID_INTEL,

		.device		= PCI_DEVICE_ID_INTEL_QRK_UART,

		.subvendor	= PCI_ANY_ID,

		.subdevice	= PCI_ANY_ID,

		.setup		= pci_default_setup,

	},

	/*

	 * ITE

	 */
@@ -2740,6 +2748,7 @@ enum pci_board_num_t { 
	pbn_ADDIDATA_PCIe_8_3906250,

	pbn_ce4100_1_115200,

	pbn_byt,

	pbn_qrk,

	pbn_omegapci,

	pbn_NETMOS9900_2s_115200,

	pbn_brcm_trumanage,
@@ -3490,6 +3499,12 @@ static struct pciserial_board pci_boards[] = { 
		.uart_offset	= 0x80,

		.reg_shift      = 2,

	},

	[pbn_qrk] = {

		.flags		= FL_BASE0,

		.num_ports	= 1,

		.base_baud	= 2764800,

		.reg_shift	= 2,

	},

	[pbn_omegapci] = {

		.flags		= FL_BASE0,

		.num_ports	= 8,
@@ -5191,6 +5206,12 @@ static struct pci_device_id serial_pci_tbl[] = { 
		PCI_CLASS_COMMUNICATION_SERIAL << 8, 0xff0000,

		pbn_byt },



	/*

	 * Intel Quark x1000

	 */

	{	PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_UART,

		PCI_ANY_ID, PCI_ANY_ID, 0, 0,

		pbn_qrk },

	/*

	 * Cronyx Omega PCI

	 */