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Commit 1eb3c2ee authored by Paolo Ciarrocchi's avatar Paolo Ciarrocchi Committed by Bartlomiej Zolnierkiewicz
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IDE: Coding Style fixes to drivers/ide/pci/sis5513.c 



About 300 errors and warnings fixed.
File is now error free.
Compile tested.

[bart: minor fixes, md5sum checked]

Signed-off-by: default avatarPaolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
parent 5749c847

drivers/ide/pci/sis5513.c

+98 −100
Original line number Diff line number Diff line
@@ -59,10 +59,10 @@ 
#define ATA_16		0x01

#define ATA_33		0x02

#define ATA_66		0x03

#define ATA_100a	0x04 // SiS730/SiS550 is ATA100 with ATA66 layout

#define ATA_100a	0x04 /* SiS730/SiS550 is ATA100 with ATA66 layout */

#define ATA_100		0x05

#define ATA_133a	0x06 // SiS961b with 133 support

#define ATA_133		0x07 // SiS962/963

#define ATA_133a	0x06 /* SiS961b with 133 support */

#define ATA_133		0x07 /* SiS962/963 */



static u8 chipset_family;
@@ -114,11 +114,12 @@ static const struct { 
static u8 cycle_time_offset[] = { 0, 0, 5, 4, 4, 0, 0 };

static u8 cycle_time_range[]  = { 0, 0, 2, 3, 3, 4, 4 };

static u8 cycle_time_value[][XFER_UDMA_6 - XFER_UDMA_0 + 1] = {

	{0,0,0,0,0,0,0}, /* no udma */

	{0,0,0,0,0,0,0}, /* no udma */

	{  0,  0, 0, 0, 0, 0, 0 }, /* no UDMA */

	{  0,  0, 0, 0, 0, 0, 0 }, /* no UDMA */

	{  3,  2, 1, 0, 0, 0, 0 }, /* ATA_33 */

	{  7,  5, 3, 2, 1, 0, 0 }, /* ATA_66 */

	{7,5,3,2,1,0,0}, /* ATA_100a (730 specific), differences are on cycle_time range and offset */

	{  7,  5, 3, 2, 1, 0, 0 }, /* ATA_100a (730 specific),

				      different cycle_time range and offset */

	{ 11,  7, 5, 4, 2, 1, 0 }, /* ATA_100 */

	{ 15, 10, 7, 5, 3, 2, 1 }, /* ATA_133a (earliest 691 southbridges) */

	{ 15, 10, 7, 5, 3, 2, 1 }, /* ATA_133 */
@@ -126,8 +127,8 @@ static u8 cycle_time_value[][XFER_UDMA_6 - XFER_UDMA_0 + 1] = { 
/* CRC Valid Setup Time vary across IDE clock setting 33/66/100/133

   See SiS962 data sheet for more detail */

static u8 cvs_time_value[][XFER_UDMA_6 - XFER_UDMA_0 + 1] = {

	{0,0,0,0,0,0,0}, /* no udma */

	{0,0,0,0,0,0,0}, /* no udma */

	{ 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */

	{ 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */

	{ 2, 1, 1, 0, 0, 0, 0 },

	{ 4, 3, 2, 1, 0, 0, 0 },

	{ 4, 3, 2, 1, 0, 0, 0 },
@@ -359,7 +360,8 @@ static u8 sis5513_ata133_udma_filter(ide_drive_t *drive) 
}



/* Chip detection and general config */

static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const char *name)

static unsigned int __devinit init_chipset_sis5513(struct pci_dev *dev,

						   const char *name)

{

	struct pci_dev *host;

	int i = 0;
@@ -467,9 +469,8 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c 
		pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x80);

		/* Set compatibility bit */

		pci_read_config_byte(dev, 0x49, &reg);

				if (!(reg & 0x01)) {

		if (!(reg & 0x01))

			pci_write_config_byte(dev, 0x49, reg|0x01);

				}

		break;

	case ATA_100a:

	case ATA_66:
@@ -478,23 +479,20 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c 


		/* On ATA_66 chips the bit was elsewhere */

		pci_read_config_byte(dev, 0x52, &reg);

				if (!(reg & 0x04)) {

		if (!(reg & 0x04))

			pci_write_config_byte(dev, 0x52, reg|0x04);

				}

		break;

	case ATA_33:

		/* On ATA_33 we didn't have a single bit to set */

		pci_read_config_byte(dev, 0x09, &reg);

				if ((reg & 0x0f) != 0x00) {

		if ((reg & 0x0f) != 0x00)

			pci_write_config_byte(dev, 0x09, reg&0xf0);

				}

	case ATA_16:

		/* force per drive recovery and active timings

		   needed on ATA_33 and below chips */

		pci_read_config_byte(dev, 0x52, &reg);

				if (!(reg & 0x08)) {

		if (!(reg & 0x08))

			pci_write_config_byte(dev, 0x52, reg|0x08);

				}

		break;

	}

	}