Loading sound/soc/msm/msm8952.c +27 −15 Original line number Diff line number Diff line Loading @@ -361,7 +361,7 @@ static int msm_auxpcm_be_params_fixup(struct snd_soc_pcm_runtime *rtd, return 0; } static int msm_pri_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, static int msm_mi2s_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, struct snd_pcm_hw_params *params) { struct snd_interval *rate = hw_param_interval(params, Loading Loading @@ -531,22 +531,34 @@ static int msm8952_get_port_id(int be_id) } } static bool is_mi2s_rx_port(int port_id) { bool ret = false; switch (port_id) { case AFE_PORT_ID_PRIMARY_MI2S_RX: case AFE_PORT_ID_SECONDARY_MI2S_RX: case AFE_PORT_ID_QUATERNARY_MI2S_RX: case AFE_PORT_ID_QUINARY_MI2S_RX: ret = true; break; default: break; } return ret; } static uint32_t get_mi2s_rx_clk_val(int port_id) { uint32_t clk_val; /* * Derive clock value based on configuration of Primary MI2S rx port, * as this port supports dynamic configuration for hifi audio * Derive clock value based on sample rate, bits per sample and * channel count is used as 2 */ if (port_id == AFE_PORT_ID_PRIMARY_MI2S_RX) { if (is_mi2s_rx_port(port_id)) clk_val = (mi2s_rx_sample_rate * mi2s_rx_bits_per_sample * 2); } else { if (mi2s_rx_bit_format == SNDRV_PCM_FORMAT_S24_LE) clk_val = Q6AFE_LPASS_IBIT_CLK_3_P072_MHZ; else clk_val = Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ; } pr_debug("%s: MI2S Rx bit clock value: 0x%0x\n", __func__, clk_val); return clk_val; } Loading Loading @@ -2236,7 +2248,7 @@ static struct snd_soc_dai_link msm8952_dai[] = { ASYNC_DPCM_SND_SOC_HW_PARAMS, .be_id = MSM_BACKEND_DAI_PRI_MI2S_RX, .init = &msm_audrx_init, .be_hw_params_fixup = msm_pri_rx_be_hw_params_fixup, .be_hw_params_fixup = msm_mi2s_rx_be_hw_params_fixup, .ops = &msm8952_mi2s_be_ops, .ignore_suspend = 1, }, Loading @@ -2250,7 +2262,7 @@ static struct snd_soc_dai_link msm8952_dai[] = { .no_pcm = 1, .dpcm_playback = 1, .be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX, .be_hw_params_fixup = msm_be_hw_params_fixup, .be_hw_params_fixup = msm_mi2s_rx_be_hw_params_fixup, .ops = &msm8952_sec_mi2s_be_ops, .ignore_suspend = 1, }, Loading Loading @@ -2280,7 +2292,7 @@ static struct snd_soc_dai_link msm8952_dai[] = { .no_pcm = 1, .dpcm_playback = 1, .be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX, .be_hw_params_fixup = msm_be_hw_params_fixup, .be_hw_params_fixup = msm_mi2s_rx_be_hw_params_fixup, .ops = &msm8952_quat_mi2s_be_ops, .ignore_pmdown_time = 1, /* dai link has playback support */ .ignore_suspend = 1, Loading Loading @@ -2496,7 +2508,7 @@ static struct snd_soc_dai_link msm8952_hdmi_dba_dai_link[] = { .no_pcm = 1, .dpcm_playback = 1, .be_id = MSM_BACKEND_DAI_QUINARY_MI2S_RX, .be_hw_params_fixup = msm_be_hw_params_fixup, .be_hw_params_fixup = msm_mi2s_rx_be_hw_params_fixup, .ops = &msm8952_quin_mi2s_be_ops, .ignore_pmdown_time = 1, /* dai link has playback support */ .ignore_suspend = 1, Loading @@ -2514,7 +2526,7 @@ static struct snd_soc_dai_link msm8952_quin_dai_link[] = { .no_pcm = 1, .dpcm_playback = 1, .be_id = MSM_BACKEND_DAI_QUINARY_MI2S_RX, .be_hw_params_fixup = msm_be_hw_params_fixup, .be_hw_params_fixup = msm_mi2s_rx_be_hw_params_fixup, .ops = &msm8952_quin_mi2s_be_ops, .ignore_pmdown_time = 1, /* dai link has playback support */ .ignore_suspend = 1, Loading sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c +9 −6 Original line number Diff line number Diff line Loading @@ -3261,10 +3261,11 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = { .stream_name = "Secondary MI2S Playback", .aif_name = "SEC_MI2S_RX", .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE, .rate_min = 8000, .rate_max = 48000, .rate_max = 192000, }, .capture = { .stream_name = "Secondary MI2S Capture", Loading Loading @@ -3309,10 +3310,11 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = { .stream_name = "Quaternary MI2S Playback", .aif_name = "QUAT_MI2S_RX", .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE, .rate_min = 8000, .rate_max = 48000, .rate_max = 192000, }, .capture = { .stream_name = "Quaternary MI2S Capture", Loading Loading @@ -3345,10 +3347,11 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = { .stream_name = "Quinary MI2S Playback", .aif_name = "QUIN_MI2S_RX", .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE, .rate_min = 8000, .rate_max = 48000, .rate_max = 192000, }, .capture = { .stream_name = "Quinary MI2S Capture", Loading Loading
sound/soc/msm/msm8952.c +27 −15 Original line number Diff line number Diff line Loading @@ -361,7 +361,7 @@ static int msm_auxpcm_be_params_fixup(struct snd_soc_pcm_runtime *rtd, return 0; } static int msm_pri_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, static int msm_mi2s_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, struct snd_pcm_hw_params *params) { struct snd_interval *rate = hw_param_interval(params, Loading Loading @@ -531,22 +531,34 @@ static int msm8952_get_port_id(int be_id) } } static bool is_mi2s_rx_port(int port_id) { bool ret = false; switch (port_id) { case AFE_PORT_ID_PRIMARY_MI2S_RX: case AFE_PORT_ID_SECONDARY_MI2S_RX: case AFE_PORT_ID_QUATERNARY_MI2S_RX: case AFE_PORT_ID_QUINARY_MI2S_RX: ret = true; break; default: break; } return ret; } static uint32_t get_mi2s_rx_clk_val(int port_id) { uint32_t clk_val; /* * Derive clock value based on configuration of Primary MI2S rx port, * as this port supports dynamic configuration for hifi audio * Derive clock value based on sample rate, bits per sample and * channel count is used as 2 */ if (port_id == AFE_PORT_ID_PRIMARY_MI2S_RX) { if (is_mi2s_rx_port(port_id)) clk_val = (mi2s_rx_sample_rate * mi2s_rx_bits_per_sample * 2); } else { if (mi2s_rx_bit_format == SNDRV_PCM_FORMAT_S24_LE) clk_val = Q6AFE_LPASS_IBIT_CLK_3_P072_MHZ; else clk_val = Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ; } pr_debug("%s: MI2S Rx bit clock value: 0x%0x\n", __func__, clk_val); return clk_val; } Loading Loading @@ -2236,7 +2248,7 @@ static struct snd_soc_dai_link msm8952_dai[] = { ASYNC_DPCM_SND_SOC_HW_PARAMS, .be_id = MSM_BACKEND_DAI_PRI_MI2S_RX, .init = &msm_audrx_init, .be_hw_params_fixup = msm_pri_rx_be_hw_params_fixup, .be_hw_params_fixup = msm_mi2s_rx_be_hw_params_fixup, .ops = &msm8952_mi2s_be_ops, .ignore_suspend = 1, }, Loading @@ -2250,7 +2262,7 @@ static struct snd_soc_dai_link msm8952_dai[] = { .no_pcm = 1, .dpcm_playback = 1, .be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX, .be_hw_params_fixup = msm_be_hw_params_fixup, .be_hw_params_fixup = msm_mi2s_rx_be_hw_params_fixup, .ops = &msm8952_sec_mi2s_be_ops, .ignore_suspend = 1, }, Loading Loading @@ -2280,7 +2292,7 @@ static struct snd_soc_dai_link msm8952_dai[] = { .no_pcm = 1, .dpcm_playback = 1, .be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX, .be_hw_params_fixup = msm_be_hw_params_fixup, .be_hw_params_fixup = msm_mi2s_rx_be_hw_params_fixup, .ops = &msm8952_quat_mi2s_be_ops, .ignore_pmdown_time = 1, /* dai link has playback support */ .ignore_suspend = 1, Loading Loading @@ -2496,7 +2508,7 @@ static struct snd_soc_dai_link msm8952_hdmi_dba_dai_link[] = { .no_pcm = 1, .dpcm_playback = 1, .be_id = MSM_BACKEND_DAI_QUINARY_MI2S_RX, .be_hw_params_fixup = msm_be_hw_params_fixup, .be_hw_params_fixup = msm_mi2s_rx_be_hw_params_fixup, .ops = &msm8952_quin_mi2s_be_ops, .ignore_pmdown_time = 1, /* dai link has playback support */ .ignore_suspend = 1, Loading @@ -2514,7 +2526,7 @@ static struct snd_soc_dai_link msm8952_quin_dai_link[] = { .no_pcm = 1, .dpcm_playback = 1, .be_id = MSM_BACKEND_DAI_QUINARY_MI2S_RX, .be_hw_params_fixup = msm_be_hw_params_fixup, .be_hw_params_fixup = msm_mi2s_rx_be_hw_params_fixup, .ops = &msm8952_quin_mi2s_be_ops, .ignore_pmdown_time = 1, /* dai link has playback support */ .ignore_suspend = 1, Loading
sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c +9 −6 Original line number Diff line number Diff line Loading @@ -3261,10 +3261,11 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = { .stream_name = "Secondary MI2S Playback", .aif_name = "SEC_MI2S_RX", .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE, .rate_min = 8000, .rate_max = 48000, .rate_max = 192000, }, .capture = { .stream_name = "Secondary MI2S Capture", Loading Loading @@ -3309,10 +3310,11 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = { .stream_name = "Quaternary MI2S Playback", .aif_name = "QUAT_MI2S_RX", .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE, .rate_min = 8000, .rate_max = 48000, .rate_max = 192000, }, .capture = { .stream_name = "Quaternary MI2S Capture", Loading Loading @@ -3345,10 +3347,11 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = { .stream_name = "Quinary MI2S Playback", .aif_name = "QUIN_MI2S_RX", .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE, .rate_min = 8000, .rate_max = 48000, .rate_max = 192000, }, .capture = { .stream_name = "Quinary MI2S Capture", Loading