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Commit 1e09ae1b authored by Veerabhadrarao Badiganti's avatar Veerabhadrarao Badiganti
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ARM: dts: msm: enable SDR104 workaround for SDX20 V2 



On SDX20, SDR104 mode might be unstable causing CRC error on
the interface. This is fixed in V2 metal. But still to support
the h/w fix we would need to make sure that retuning is done
whenever clock is ungated.  This patch enables "qcom,sdr104-wa"
property to enable this fix on sdx20 v2.

Change-Id: I5febf311ce246757385565b64767ed8db874d3ed
Signed-off-by: default avatarVeerabhadrarao Badiganti <vbadigan@codeaurora.org>
parent 17a3f7c3

arch/arm/boot/dts/qcom/sdx20-v2-nand-dualwifi-cdp.dts

+2 −0
Original line number Diff line number Diff line
@@ -43,6 +43,8 @@ 
	qcom,core_3_0v_support;

	qcom,nonremovable;



	qcom,sdr104-wa;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on

				&sdc1_wlan_gpio_active>;

arch/arm/boot/dts/qcom/sdx20-v2-nand-dualwifi-mtp.dts

+2 −0
Original line number Diff line number Diff line
@@ -35,6 +35,8 @@ 
	qcom,core_3_0v_support;

	qcom,nonremovable;



	qcom,sdr104-wa;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on

				&sdc1_wlan_gpio_active>;