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Commit 1dbc8664 authored Aug 01, 2016 by Maulik Shah

ARM: dts: msm: Do not set rpm handshake bit for MDMs



CPU spm handshakes with rpm for single cpu devices. Remove
programming rpm handshake bit by default. Instead it will
be set when cluster level LPM with rpm notification is selected.

CRs-Fixed: 1043098
Change-Id: I84181baadfbab430f383ed096da75027e4d68c41
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>

parent 135cb1e4

arch/arm/boot/dts/qcom/mdm9607-pm.dtsi

+0 −1

Original line number	Original line	Diff line number	Diff line
	@@ -24,7 +24,6 @@
	qcom,saw2-cfg = <0x1>;		qcom,saw2-cfg = <0x1>;
	qcom,saw2-spm-dly= <0x3c102800>;		qcom,saw2-spm-dly= <0x3c102800>;
	qcom,saw2-spm-ctl = <0xe>;		qcom,saw2-spm-ctl = <0xe>;
	qcom,supports-rpm-hs;
	qcom,mode0 {		qcom,mode0 {
	qcom,label = "qcom,saw2-spm-cmd-wfi";		qcom,label = "qcom,saw2-spm-cmd-wfi";
	qcom,sequence = [04 03 04 0f];		qcom,sequence = [04 03 04 0f];

arch/arm/boot/dts/qcom/mdm9640-pm.dtsi

+0 −1

Original line number	Original line	Diff line number	Diff line
	@@ -20,7 +20,6 @@
	reg = <0xb009000 0x1000>;		reg = <0xb009000 0x1000>;
	qcom,name = "cpu0";		qcom,name = "cpu0";
	qcom,cpu = <&CPU0>;		qcom,cpu = <&CPU0>;
	qcom,supports-rpm-hs;
	qcom,saw2-ver-reg = <0xfd0>;		qcom,saw2-ver-reg = <0xfd0>;
	qcom,saw2-cfg = <0x101>;		qcom,saw2-cfg = <0x101>;
	qcom,saw2-spm-dly= <0x401004>;		qcom,saw2-spm-dly= <0x401004>;

arch/arm/boot/dts/qcom/mdmcalifornium-pm.dtsi

+0 −1

Original line number	Original line	Diff line number	Diff line
	@@ -20,7 +20,6 @@
	reg = <0xb009000 0x1000>;		reg = <0xb009000 0x1000>;
	qcom,name = "core0";		qcom,name = "core0";
	qcom,cpu = <&CPU0>;		qcom,cpu = <&CPU0>;
	qcom,supports-rpm-hs;
	qcom,saw2-ver-reg = <0xfd0>;		qcom,saw2-ver-reg = <0xfd0>;
	qcom,saw2-cfg = <0x101>;		qcom,saw2-cfg = <0x101>;
	qcom,saw2-spm-dly= <0x401004>;		qcom,saw2-spm-dly= <0x401004>;