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Commit 1d6040f1 authored by Robert Richter's avatar Robert Richter
Browse files

perf, x86: make IBS macros available in perf_event.h 



This patch moves code from oprofile to perf_event.h to make it also
available for usage by perf.

Signed-off-by: default avatarRobert Richter <robert.richter@amd.com>
parent 86d62b6f

arch/x86/include/asm/perf_event.h

+10 −0
Original line number Diff line number Diff line
@@ -117,6 +117,16 @@ union cpuid10_edx { 
 */

#define X86_PMC_IDX_FIXED_BTS				(X86_PMC_IDX_FIXED + 16)



/* IbsFetchCtl bits/masks */

#define IBS_FETCH_RAND_EN		(1ULL<<57)

#define IBS_FETCH_VAL			(1ULL<<49)

#define IBS_FETCH_ENABLE		(1ULL<<48)

#define IBS_FETCH_CNT_MASK		0xFFFF0000ULL



/* IbsOpCtl bits */

#define IBS_OP_CNT_CTL			(1ULL<<19)

#define IBS_OP_VAL			(1ULL<<18)

#define IBS_OP_ENABLE			(1ULL<<17)



#ifdef CONFIG_PERF_EVENTS

extern void init_hw_perf_events(void);

arch/x86/oprofile/op_model_amd.c

+0 −11
Original line number Diff line number Diff line
@@ -46,17 +46,6 @@ 


static unsigned long reset_value[NUM_VIRT_COUNTERS];



/* IbsFetchCtl bits/masks */

#define IBS_FETCH_RAND_EN		(1ULL<<57)

#define IBS_FETCH_VAL			(1ULL<<49)

#define IBS_FETCH_ENABLE		(1ULL<<48)

#define IBS_FETCH_CNT_MASK		0xFFFF0000ULL



/* IbsOpCtl bits */

#define IBS_OP_CNT_CTL			(1ULL<<19)

#define IBS_OP_VAL			(1ULL<<18)

#define IBS_OP_ENABLE			(1ULL<<17)



#define IBS_FETCH_SIZE			6

#define IBS_OP_SIZE			12