Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1c983986 authored by Yonghong Song's avatar Yonghong Song Committed by Ralf Baechle
Browse files

MIPS: Netlogic: Add support for XLP5XX 



Add support for the XLP5XX processor which is an 8 core variant of the
XLP9XX. Add XLP5XX cases to code which earlier handled XLP9XX.

Signed-off-by: default avatarYonghong Song <ysong@broadcom.com>
Signed-off-by: default avatarJayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6871/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent edf3ed5e

arch/mips/include/asm/cpu.h

+1 −0
Original line number Diff line number Diff line
@@ -201,6 +201,7 @@ 
#define PRID_IMP_NETLOGIC_XLP3XX	0x1100

#define PRID_IMP_NETLOGIC_XLP2XX	0x1200

#define PRID_IMP_NETLOGIC_XLP9XX	0x1500

#define PRID_IMP_NETLOGIC_XLP5XX	0x1300



/*

 * Particular Revision values for bits 7:0 of the PRId register.

arch/mips/include/asm/netlogic/mips-extns.h

+2 −1
Original line number Diff line number Diff line
@@ -148,7 +148,8 @@ static inline int nlm_nodeid(void) 
{

	uint32_t prid = read_c0_prid() & PRID_IMP_MASK;



	if (prid == PRID_IMP_NETLOGIC_XLP9XX)

	if ((prid == PRID_IMP_NETLOGIC_XLP9XX) ||

			(prid == PRID_IMP_NETLOGIC_XLP5XX))

		return (__read_32bit_c0_register($15, 1) >> 7) & 0x7;

	else

		return (__read_32bit_c0_register($15, 1) >> 5) & 0x3;

arch/mips/include/asm/netlogic/xlp-hal/xlp.h

+4 −2
Original line number Diff line number Diff line
@@ -102,14 +102,16 @@ static inline int cpu_is_xlpii(void) 
	int chip = read_c0_prid() & PRID_IMP_MASK;



	return chip == PRID_IMP_NETLOGIC_XLP2XX ||

		chip == PRID_IMP_NETLOGIC_XLP9XX;

		chip == PRID_IMP_NETLOGIC_XLP9XX ||

		chip == PRID_IMP_NETLOGIC_XLP5XX;

}



static inline int cpu_is_xlp9xx(void)

{

	int chip = read_c0_prid() & PRID_IMP_MASK;



	return chip == PRID_IMP_NETLOGIC_XLP9XX;

	return chip == PRID_IMP_NETLOGIC_XLP9XX ||

		chip == PRID_IMP_NETLOGIC_XLP5XX;

}

#endif /* !__ASSEMBLY__ */

#endif /* _ASM_NLM_XLP_H */

arch/mips/kernel/cpu-probe.c

+1 −0
Original line number Diff line number Diff line
@@ -1059,6 +1059,7 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu) 
	switch (c->processor_id & PRID_IMP_MASK) {

	case PRID_IMP_NETLOGIC_XLP2XX:

	case PRID_IMP_NETLOGIC_XLP9XX:

	case PRID_IMP_NETLOGIC_XLP5XX:

		c->cputype = CPU_XLP;

		__cpu_name[cpu] = "Broadcom XLPII";

		break;

arch/mips/netlogic/common/reset.S

+4 −0
Original line number Diff line number Diff line
@@ -177,6 +177,10 @@ FEXPORT(nlm_reset_entry) 
	beq	t0, t1, 2f		/* does not need to set coherent */

	nop



	li	t1, 0x1300		/* XLP 5xx */

	beq	t0, t1, 2f		/* does not need to set coherent */

	nop



	/* set bit in SYS coherent register for the core */

	mfc0	t0, CP0_EBASE, 1

	mfc0	t1, CP0_EBASE, 1