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Commit 1c7eccab authored by Deepak Katragadda's avatar Deepak Katragadda
Browse files

clk: msm: gdsc: Support new enable sequence for GDSC_GPU_GX 



On some targets, in order to flush out the demet cells in the
GFX PMIC domain, the GFX SW reset should be asserted and then
de-asserted before enabling the gdsc_gpu_gx. Add support in
the GDSC framework for the same.

Change-Id: I62e9d6324304f9fe56f446bf51d514ae139c8482
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent ec971dd4

drivers/clk/msm/gdsc.c

+29 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ 
#define HW_CONTROL_MASK		BIT(1)

#define SW_COLLAPSE_MASK	BIT(0)

#define GMEM_CLAMP_IO_MASK	BIT(0)

#define BCR_BLK_ARES_BIT	BIT(0)



/* Wait 2^n CXO cycles between all states. Here, n=2 (4 cycles). */

#define EN_REST_WAIT_VAL	(0x2 << 20)
@@ -93,6 +94,7 @@ struct gdsc { 
	bool			is_gdsc_enabled;

	void __iomem		*domain_addr;

	void __iomem		*hw_ctrl_addr;

	void __iomem		*sw_reset_addr;

};



static int gdsc_is_enabled(struct regulator_dev *rdev)
@@ -126,6 +128,24 @@ static int gdsc_enable(struct regulator_dev *rdev) 
		clk_prepare_enable(sc->clocks[sc->root_clk_idx]);



	if (sc->toggle_logic) {

		if (sc->sw_reset_addr) {

			regval = readl_relaxed(sc->sw_reset_addr);

			regval |= BCR_BLK_ARES_BIT;

			writel_relaxed(regval, sc->sw_reset_addr);

			/*

			 * BLK_ARES should be kept asserted for 1us before

			 * being de-asserted.

			 */

			wmb();

			udelay(1);



			regval &= ~BCR_BLK_ARES_BIT;

			writel_relaxed(regval, sc->sw_reset_addr);



			/* Make sure de-assert goes through before continuing */

			wmb();

		}



		if (sc->domain_addr) {

			regval = readl_relaxed(sc->domain_addr);

			regval &= ~GMEM_CLAMP_IO_MASK;
@@ -403,6 +423,15 @@ static int gdsc_probe(struct platform_device *pdev) 
			return -ENOMEM;

	}



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,

							"sw_reset");

	if (res) {

		sc->sw_reset_addr = devm_ioremap(&pdev->dev, res->start,

							resource_size(res));

		if (sc->sw_reset_addr == NULL)

			return -ENOMEM;

	}



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,

							"hw_ctrl_addr");

	if (res) {