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Commit 1c7c4451 authored by Kevin Cernekee's avatar Kevin Cernekee Committed by Ralf Baechle
Browse files

MIPS: BMIPS: Add CFLAGS, Makefile entries for BMIPS



Add CONFIG_CPU_BMIPS* in all of the right places, so that BMIPS kernel
images will compile and run.

Signed-off-by: default avatarKevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2955/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 15fb0a15
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+1 −0
Original line number Diff line number Diff line
@@ -157,6 +157,7 @@ ifeq (,$(findstring march=octeon, $(cflags-$(CONFIG_CPU_CAVIUM_OCTEON))))
cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += -Wa,-march=octeon
endif
cflags-$(CONFIG_CAVIUM_CN63XXP1) += -Wa,-mfix-cn63xxp1
cflags-$(CONFIG_CPU_BMIPS)	+= -march=mips32 -Wa,-mips32 -Wa,--trap

cflags-$(CONFIG_CPU_R4000_WORKAROUNDS)	+= $(call cc-option,-mfix-r4000,)
cflags-$(CONFIG_CPU_R4400_WORKAROUNDS)	+= $(call cc-option,-mfix-r4400,)
+2 −1
Original line number Diff line number Diff line
@@ -87,7 +87,8 @@ do { \
	: "=r" (tmp));							\
} while (0)

#elif defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MIPS_ALCHEMY)
#elif (defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MIPS_ALCHEMY)) || \
	defined(CONFIG_CPU_BMIPS)

/*
 * These are slightly complicated by the fact that we guarantee R1 kernels to
+3 −1
Original line number Diff line number Diff line
@@ -74,7 +74,9 @@ search_module_dbetables(unsigned long addr)
}
#endif

#ifdef CONFIG_CPU_MIPS32_R1
#ifdef CONFIG_CPU_BMIPS
#define MODULE_PROC_FAMILY "BMIPS "
#elif defined CONFIG_CPU_MIPS32_R1
#define MODULE_PROC_FAMILY "MIPS32_R1 "
#elif defined CONFIG_CPU_MIPS32_R2
#define MODULE_PROC_FAMILY "MIPS32_R2 "