Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1b158426 authored by Sahitya Tummala's avatar Sahitya Tummala
Browse files

ARM: dts: msm: Add missing QoS and devfreq table for sdhc on MSM8909 



Add missing QoS and devfreq table for sdhc1 and sdhc2 device nodes.

Without the devfreq table, the clock scaling would happen with the
default parameters of 400KHz <-> 177MHz or 200MHz, which would impact
the performance.

The current qcom,cpu-dma-latency-us is not applicable on msm-3.18.
Hence, add the right QoS parameters so that driver can put the
correct vote as per the data load.

Change-Id: I298002e77c10d23ef96661b5153b088a3cf3136c
Signed-off-by: default avatarSahitya Tummala <stummala@codeaurora.org>
parent fbfdd7c9

arch/arm/boot/dts/qcom/msm8909.dtsi

+8 −2
Original line number Diff line number Diff line
@@ -951,7 +951,9 @@ 


		qcom,bus-width = <8>;



		qcom,cpu-dma-latency-us = <2 241 501>;

		qcom,pm-qos-irq-type = "affine_irq";

		qcom,pm-qos-irq-latency = <2 250>;



		qcom,msm-bus,name = "sdhc1";

		qcom,msm-bus,num-cases = <8>;

		qcom,msm-bus,num-paths = <1>;
@@ -971,6 +973,7 @@ 
			 <&clock_gcc clk_gcc_sdcc1_apps_clk>;

		clock-names = "iface_clk", "core_clk";

		qcom,clk-rates = <400000 25000000 50000000 100000000 177770000>;

		qcom,devfreq,freq-table = <50000000 177770000>;



		status = "disabled";

	};
@@ -985,7 +988,9 @@ 


		qcom,bus-width = <4>;



		qcom,cpu-dma-latency-us = <2 241 501>;

		qcom,pm-qos-irq-type = "affine_irq";

		qcom,pm-qos-irq-latency = <2 250>;



		qcom,msm-bus,name = "sdhc2";

		qcom,msm-bus,num-cases = <8>;

		qcom,msm-bus,num-paths = <1>;
@@ -1005,6 +1010,7 @@ 
		clock-names = "iface_clk", "core_clk";



		qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;

		qcom,devfreq,freq-table = <50000000 200000000>;



		status = "disabled";

	};