Merge branch 'clockevents/3.17' of...

* Cirrus Logic CLPS711X Timer Counter

Required properties:

- compatible: Shall contain "cirrus,clps711x-timer".

- reg       : Address and length of the register set.

- interrupts: The interrupt number of the timer.

- clocks    : phandle of timer reference clock.

Note: Each timer should have an alias correctly numbered in "aliases" node.

Example:

	aliases {

		timer0 = &timer1;

		timer1 = &timer2;

	};

	timer1: timer@80000300 {

		compatible = "cirrus,ep7312-timer", "cirrus,clps711x-timer";

		reg = <0x80000300 0x4>;

		interrupts = <8>;

		clocks = <&clks 5>;

	};

	timer2: timer@80000340 {

		compatible = "cirrus,ep7312-timer", "cirrus,clps711x-timer";

		reg = <0x80000340 0x4>;

		interrupts = <9>;

		clocks = <&clks 6>;

	};

Mediatek MT6577, MT6572 and MT6589 Timers

---------------------------------------

Required properties:

- compatible: Should be "mediatek,mt6577-timer"

- reg: Should contain location and length for timers register.

- clocks: Clocks driving the timer hardware. This list should include two

	clocks. The order is system clock and as second clock the RTC clock.

Examples:

	timer@10008000 {

		compatible = "mediatek,mt6577-timer";

		reg = <0x10008000 0x80>;

		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&system_clk>, <&rtc_clk>;

	};

* Renesas R-Car Compare Match Timer (CMT)

The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock

inputs and programmable compare match.

Channels share hardware resources but their counter and compare match value

are independent. A particular CMT instance can implement only a subset of the

channels supported by the CMT model. Channel indices represent the hardware

position of the channel in the CMT and don't match the channel numbers in the

datasheets.

Required Properties:

  - compatible: must contain one of the following.

    - "renesas,cmt-32" for the 32-bit CMT

		(CMT0 on sh7372, sh73a0 and r8a7740)

    - "renesas,cmt-32-fast" for the 32-bit CMT with fast clock support

		(CMT[234] on sh7372, sh73a0 and r8a7740)

    - "renesas,cmt-48" for the 48-bit CMT

		(CMT1 on sh7372, sh73a0 and r8a7740)

    - "renesas,cmt-48-gen2" for the second generation 48-bit CMT

		(CMT[01] on r8a73a4, r8a7790 and r8a7791)

  - reg: base address and length of the registers block for the timer module.

  - interrupts: interrupt-specifier for the timer, one per channel.

  - clocks: a list of phandle + clock-specifier pairs, one for each entry

    in clock-names.

  - clock-names: must contain "fck" for the functional clock.

  - renesas,channels-mask: bitmask of the available channels.

Example: R8A7790 (R-Car H2) CMT0 node

	CMT0 on R8A7790 implements hardware channels 5 and 6 only and names

	them channels 0 and 1 in the documentation.

	cmt0: timer@ffca0000 {

		compatible = "renesas,cmt-48-gen2";

		reg = <0 0xffca0000 0 0x1004>;

		interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,

			     <0 142 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp1_clks R8A7790_CLK_CMT0>;

		clock-names = "fck";

		renesas,channels-mask = <0x60>;

	};

* Renesas R-Car Multi-Function Timer Pulse Unit 2 (MTU2)

The MTU2 is a multi-purpose, multi-channel timer/counter with configurable

clock inputs and programmable compare match.

Channels share hardware resources but their counter and compare match value

are independent. The MTU2 hardware supports five channels indexed from 0 to 4.

Required Properties:

  - compatible: must contain "renesas,mtu2"

  - reg: base address and length of the registers block for the timer module.

  - interrupts: interrupt specifiers for the timer, one for each entry in

    interrupt-names.

  - interrupt-names: must contain one entry named "tgi?a" for each enabled

    channel, where "?" is the channel index expressed as one digit from "0" to

    "4".

  - clocks: a list of phandle + clock-specifier pairs, one for each entry

    in clock-names.

  - clock-names: must contain "fck" for the functional clock.

Example: R7S72100 (RZ/A1H) MTU2 node

	mtu2: timer@fcff0000 {

		compatible = "renesas,mtu2";

		reg = <0xfcff0000 0x400>;

		interrupts = <0 139 IRQ_TYPE_LEVEL_HIGH>,

			     <0 146 IRQ_TYPE_LEVEL_HIGH>,

			     <0 150 IRQ_TYPE_LEVEL_HIGH>,

			     <0 154 IRQ_TYPE_LEVEL_HIGH>,

			     <0 159 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "tgi0a", "tgi1a", "tgi2a", "tgi3a", "tgi4a";

		clocks = <&mstp3_clks R7S72100_CLK_MTU2>;

		clock-names = "fck";

	};

* Renesas R-Car Timer Unit (TMU)

The TMU is a 32-bit timer/counter with configurable clock inputs and

programmable compare match.

Channels share hardware resources but their counter and compare match value

are independent. The TMU hardware supports up to three channels.

Required Properties:

  - compatible: must contain "renesas,tmu"

  - reg: base address and length of the registers block for the timer module.

  - interrupts: interrupt-specifier for the timer, one per channel.

  - clocks: a list of phandle + clock-specifier pairs, one for each entry

    in clock-names.

  - clock-names: must contain "fck" for the functional clock.

Optional Properties:

  - #renesas,channels: number of channels implemented by the timer, must be 2

    or 3 (if not specified the value defaults to 3).

Example: R8A7779 (R-Car H1) TMU0 node

	tmu0: timer@ffd80000 {

		compatible = "renesas,tmu";

		reg = <0xffd80000 0x30>;

		interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,

			     <0 33 IRQ_TYPE_LEVEL_HIGH>,

			     <0 34 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp0_clks R8A7779_CLK_TMU0>;

		clock-names = "fck";

		#renesas,channels = <3>;

	};