Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1a8808ea authored by Jaydeep Sen's avatar Jaydeep Sen Committed by Gerrit - the friendly Code Review server
Browse files

ARM: dts: msm: Add gdsc handles for msmthorium 



GDSC handles are added to be accessed by clients, and also add the
corresponding clocks required by GDSC.

Change-Id: Ib42f12d247c9d86e3b73163d0ee5e8f4f99f32a8
Signed-off-by: default avatarJaydeep Sen <jsen@codeaurora.org>
parent 6a737abf

arch/arm/boot/dts/qcom/msmthorium.dtsi

+69 −0
Original line number Original line Diff line number Diff line
@@ -785,3 +785,72 @@ 
#include "msmthorium-regulator.dtsi"

#include "msmthorium-regulator.dtsi"

#include "msm-pmthorium.dtsi"

#include "msm-pmthorium.dtsi"

#include "msm-pmithorium.dtsi"

#include "msm-pmithorium.dtsi"

#include "msm-gdsc-8916.dtsi"



&gdsc_venus {

	clock-names = "bus_clk", "core_clk";

	clocks = <&clock_gcc clk_gcc_venus0_axi_clk>,

		 <&clock_gcc clk_gcc_venus0_vcodec0_clk>;

	status = "okay";

};



&gdsc_venus_core0 {

	qcom,support-hw-trigger;

	clock-names ="core0_clk";

	clocks = <&clock_gcc clk_gcc_venus0_core0_vcodec0_clk>;

	status = "okay";

};



&gdsc_mdss {

	clock-names = "core_clk", "bus_clk";

	clocks = <&clock_gcc clk_gcc_mdss_mdp_clk>,

		 <&clock_gcc clk_gcc_mdss_axi_clk>;

	status = "okay";

};



&gdsc_jpeg {

	clock-names = "core_clk", "bus_clk";

	clocks = <&clock_gcc clk_gcc_camss_jpeg0_clk>,

		 <&clock_gcc clk_gcc_camss_jpeg_axi_clk>;

	status = "okay";

};



&gdsc_vfe {

	clock-names = "core_clk", "bus_clk", "micro_clk",

			"csi_clk";

	clocks = <&clock_gcc clk_gcc_camss_vfe0_clk>,

		 <&clock_gcc clk_gcc_camss_vfe_axi_clk>,

		 <&clock_gcc clk_gcc_camss_micro_ahb_clk>,

		 <&clock_gcc clk_gcc_camss_csi_vfe0_clk>;

	status = "okay";

};



&gdsc_vfe1 {

	clock-names = "core_clk", "bus_clk", "micro_clk",

			"csi_clk";

	clocks = <&clock_gcc clk_gcc_camss_vfe1_clk>,

		 <&clock_gcc clk_gcc_camss_vfe1_axi_clk>,

		 <&clock_gcc clk_gcc_camss_micro_ahb_clk>,

		 <&clock_gcc clk_gcc_camss_csi_vfe1_clk>;

	status = "okay";

};



&gdsc_cpp {

	clock-names = "core_clk", "bus_clk";

	clocks = <&clock_gcc clk_gcc_camss_cpp_clk>,

		 <&clock_gcc clk_gcc_camss_cpp_axi_clk>;

	status = "okay";

};



&gdsc_oxili_gx {

	clock-names = "core_root_clk", "gmem_clk";

	clocks =<&clock_gcc clk_gfx3d_clk_src>,

		<&clock_gcc clk_gcc_oxili_gmem_clk>;

	qcom,enable-root-clk;

	status = "okay";

};



&gdsc_oxili_cx {

	reg = <0x1859044 0x4>;

	status = "okay";

};