Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1a8098be authored by Stephen Hemminger's avatar Stephen Hemminger Committed by Jeff Garzik
Browse files

skge: MTU changing fix 



The code to change MTU doesn't correctly handle all the chip variations
and requirements for restarting.  On Genesis chips changing MTU would just
cause receiver to hang.
Use a simpler approach of just taking link down/up if needed.

Signed-off-by: default avatarStephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 44c7fcce

drivers/net/skge.c

+2 −33
Original line number Original line Diff line number Diff line
@@ -2896,11 +2896,7 @@ static void skge_tx_timeout(struct net_device *dev) 




static int skge_change_mtu(struct net_device *dev, int new_mtu)

static int skge_change_mtu(struct net_device *dev, int new_mtu)

{

{

	struct skge_port *skge = netdev_priv(dev);

	struct skge_hw *hw = skge->hw;

	int port = skge->port;

	int err;

	int err;

	u16 ctl, reg;





	if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)

	if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)

		return -EINVAL;

		return -EINVAL;
@@ -2910,40 +2906,13 @@ static int skge_change_mtu(struct net_device *dev, int new_mtu) 
		return 0;

		return 0;

	}

	}





	skge_write32(hw, B0_IMSK, 0);

	skge_down(dev);

	dev->trans_start = jiffies;	/* prevent tx timeout */

	netif_stop_queue(dev);

	napi_disable(&skge->napi);



	ctl = gma_read16(hw, port, GM_GP_CTRL);

	gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);



	skge_rx_clean(skge);

	skge_rx_stop(hw, port);





	dev->mtu = new_mtu;

	dev->mtu = new_mtu;





	reg = GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);

	err = skge_up(dev);

	if (new_mtu > 1500)

		reg |= GM_SMOD_JUMBO_ENA;

	gma_write16(hw, port, GM_SERIAL_MODE, reg);



	skge_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);



	err = skge_rx_fill(dev);

	wmb();

	if (!err)

		skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F);

	skge_write32(hw, B0_IMSK, hw->intr_mask);



	if (err)

	if (err)

		dev_close(dev);

		dev_close(dev);

	else {

		gma_write16(hw, port, GM_GP_CTRL, ctl);



		napi_enable(&skge->napi);

		netif_wake_queue(dev);

	}





	return err;

	return err;

}

}