Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 199785ea authored by Matthias-Christian Ott's avatar Matthias-Christian Ott Committed by Dave Jones
Browse files

[CPUFREQ] p4-clockmod reports wrong frequency. 

http://bugzilla.kernel.org/show_bug.cgi?id=10968



[ Updated for current tree, and fixed compile failure
  when p4-clockmod was built modular -- davej]

From: Matthias-Christian Ott <ott@mirix.org>
Signed-off-by: default avatarDominik Brodowski <linux@brodo.de>
Signed-off-by: default avatarDave Jones <davej@redhat.com>
parent 0cb8bc25

arch/x86/include/asm/timer.h

+1 −1
Original line number Diff line number Diff line
@@ -11,8 +11,8 @@ unsigned long native_calibrate_tsc(void); 


#ifdef CONFIG_X86_32

extern int timer_ack;

#endif

extern int recalibrate_cpu_khz(void);

#endif /* CONFIG_X86_32 */



extern int no_timer_check;

arch/x86/kernel/cpu/cpufreq/p4-clockmod.c

+7 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 


#include <asm/processor.h>

#include <asm/msr.h>

#include <asm/timer.h>



#include "speedstep-lib.h"
@@ -224,6 +225,12 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy) 
		dprintk("has errata -- disabling low frequencies\n");

	}



	if (speedstep_detect_processor() == SPEEDSTEP_CPU_P4D &&

	    c->x86_model < 2) {

		/* switch to maximum frequency and measure result */

		cpufreq_p4_setdc(policy->cpu, DC_DISABLE);

		recalibrate_cpu_khz();

	}

	/* get max frequency */

	stock_freq = cpufreq_p4_get_frequency(c);

	if (!stock_freq)

arch/x86/kernel/cpu/cpufreq/speedstep-lib.c

+20 −14
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#include <linux/slab.h>



#include <asm/msr.h>

#include <asm/tsc.h>

#include "speedstep-lib.h"



#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
@@ -178,6 +179,15 @@ static unsigned int pentium4_get_frequency(void) 
	u32 msr_lo, msr_hi, mult;

	unsigned int fsb = 0;

	unsigned int ret;

	u8 fsb_code;



	/* Pentium 4 Model 0 and 1 do not have the Core Clock Frequency

	 * to System Bus Frequency Ratio Field in the Processor Frequency

	 * Configuration Register of the MSR. Therefore the current

	 * frequency cannot be calculated and has to be measured.

	 */

	if (c->x86_model < 2)

		return cpu_khz;



	rdmsr(0x2c, msr_lo, msr_hi);
@@ -188,10 +198,7 @@ static unsigned int pentium4_get_frequency(void) 
	 * revision #12 in Table B-1: MSRs in the Pentium 4 and

	 * Intel Xeon Processors, on page B-4 and B-5.

	 */

	if (c->x86_model < 2)

		fsb = 100 * 1000;

	else {

		u8 fsb_code = (msr_lo >> 16) & 0x7;

	fsb_code = (msr_lo >> 16) & 0x7;

	switch (fsb_code) {

	case 0:

		fsb = 100 * 1000;
@@ -203,7 +210,6 @@ static unsigned int pentium4_get_frequency(void) 
		fsb = 200 * 1000;

		break;

	}

	}



	if (!fsb)

		printk(KERN_DEBUG PFX "couldn't detect FSB speed. "

arch/x86/kernel/tsc.c

+0 −3
Original line number Diff line number Diff line
@@ -523,8 +523,6 @@ unsigned long native_calibrate_tsc(void) 
	return tsc_pit_min;

}



#ifdef CONFIG_X86_32

/* Only called from the Powernow K7 cpu freq driver */

int recalibrate_cpu_khz(void)

{

#ifndef CONFIG_SMP
@@ -546,7 +544,6 @@ int recalibrate_cpu_khz(void) 


EXPORT_SYMBOL(recalibrate_cpu_khz);



#endif /* CONFIG_X86_32 */



/* Accelerators for sched_clock()

 * convert from cycles(64bits) => nanoseconds (64bits)