coresight: set clock enable bit for m4m tpdm

Few registers in M4M TPDM are implemented in the core clock domain
instead of APB clock domain. Accessing these registers require
clock enable bit to be set in clock control register. Add support
to set this bit for M4M TPDM.

Change-Id: I67411feaa1315c857bdf5958665a9a90e1497d81
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>