Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 198e31d0 authored by Alexander Shiyan's avatar Alexander Shiyan Committed by Shawn Guo
Browse files

ARM: dts: imx27-phytec-phycore-som: Fix active level for FEC reset 



FEC reset GPIO is active low. Fix this typo.

Signed-off-by: default avatarAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent 560723a5

arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -182,7 +182,7 @@ 


&fec {

	phy-mode = "mii";

	phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_HIGH>;

	phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;

	phy-supply = <&reg_3v3>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_fec1>;