Loading arch/arm/Kconfig +7 −3 Original line number Diff line number Diff line Loading @@ -235,6 +235,7 @@ config ARCH_INTEGRATOR select ICST select GENERIC_CLOCKEVENTS select PLAT_VERSATILE select PLAT_VERSATILE_FPGA_IRQ help Support for ARM's Integrator platform. Loading @@ -242,11 +243,11 @@ config ARCH_REALVIEW bool "ARM Ltd. RealView family" select ARM_AMBA select CLKDEV_LOOKUP select HAVE_SCHED_CLOCK select ICST select GENERIC_CLOCKEVENTS select ARCH_WANT_OPTIONAL_GPIOLIB select PLAT_VERSATILE select PLAT_VERSATILE_CLCD select ARM_TIMER_SP804 select GPIO_PL061 if GPIOLIB help Loading @@ -257,11 +258,12 @@ config ARCH_VERSATILE select ARM_AMBA select ARM_VIC select CLKDEV_LOOKUP select HAVE_SCHED_CLOCK select ICST select GENERIC_CLOCKEVENTS select ARCH_WANT_OPTIONAL_GPIOLIB select PLAT_VERSATILE select PLAT_VERSATILE_CLCD select PLAT_VERSATILE_FPGA_IRQ select ARM_TIMER_SP804 help This enables support for ARM Ltd Versatile board. Loading @@ -274,9 +276,10 @@ config ARCH_VEXPRESS select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select HAVE_CLK select HAVE_SCHED_CLOCK select HAVE_PATA_PLATFORM select ICST select PLAT_VERSATILE select PLAT_VERSATILE_CLCD help This enables support for the ARM Ltd Versatile Express boards. Loading Loading @@ -1008,6 +1011,7 @@ source "arch/arm/mach-ux500/Kconfig" source "arch/arm/mach-versatile/Kconfig" source "arch/arm/mach-vexpress/Kconfig" source "arch/arm/plat-versatile/Kconfig" source "arch/arm/mach-vt8500/Kconfig" Loading arch/arm/include/asm/localtimer.h +7 −1 Original line number Diff line number Diff line Loading @@ -44,8 +44,14 @@ int local_timer_ack(void); /* * Setup a local timer interrupt for a CPU. */ void local_timer_setup(struct clock_event_device *); int local_timer_setup(struct clock_event_device *); #else static inline int local_timer_setup(struct clock_event_device *evt) { return -ENXIO; } #endif #endif arch/arm/include/asm/outercache.h +8 −6 Original line number Diff line number Diff line Loading @@ -21,6 +21,8 @@ #ifndef __ASM_OUTERCACHE_H #define __ASM_OUTERCACHE_H #include <linux/types.h> struct outer_cache_fns { void (*inv_range)(unsigned long, unsigned long); void (*clean_range)(unsigned long, unsigned long); Loading @@ -38,17 +40,17 @@ struct outer_cache_fns { extern struct outer_cache_fns outer_cache; static inline void outer_inv_range(unsigned long start, unsigned long end) static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) { if (outer_cache.inv_range) outer_cache.inv_range(start, end); } static inline void outer_clean_range(unsigned long start, unsigned long end) static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) { if (outer_cache.clean_range) outer_cache.clean_range(start, end); } static inline void outer_flush_range(unsigned long start, unsigned long end) static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) { if (outer_cache.flush_range) outer_cache.flush_range(start, end); Loading @@ -74,11 +76,11 @@ static inline void outer_disable(void) #else static inline void outer_inv_range(unsigned long start, unsigned long end) static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) { } static inline void outer_clean_range(unsigned long start, unsigned long end) static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) { } static inline void outer_flush_range(unsigned long start, unsigned long end) static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) { } static inline void outer_flush_all(void) { } static inline void outer_inv_all(void) { } Loading arch/arm/include/asm/pgtable.h +2 −1 Original line number Diff line number Diff line Loading @@ -301,6 +301,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; #define pgd_present(pgd) (1) #define pgd_clear(pgdp) do { } while (0) #define set_pgd(pgd,pgdp) do { } while (0) #define set_pud(pud,pudp) do { } while (0) /* Find an entry in the second-level page table.. */ Loading Loading @@ -351,7 +352,7 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) #define pte_unmap(pte) __pte_unmap(pte) #define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT) #define pfn_pte(pfn,prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) #define pfn_pte(pfn,prot) __pte(__pfn_to_phys(pfn) | pgprot_val(prot)) #define pte_page(pte) pfn_to_page(pte_pfn(pte)) #define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot) Loading arch/arm/include/asm/setup.h +1 −1 Original line number Diff line number Diff line Loading @@ -195,7 +195,7 @@ static struct tagtable __tagtable_##fn __tag = { tag, fn } #define NR_BANKS 8 struct membank { unsigned long start; phys_addr_t start; unsigned long size; unsigned int highmem; }; Loading Loading
arch/arm/Kconfig +7 −3 Original line number Diff line number Diff line Loading @@ -235,6 +235,7 @@ config ARCH_INTEGRATOR select ICST select GENERIC_CLOCKEVENTS select PLAT_VERSATILE select PLAT_VERSATILE_FPGA_IRQ help Support for ARM's Integrator platform. Loading @@ -242,11 +243,11 @@ config ARCH_REALVIEW bool "ARM Ltd. RealView family" select ARM_AMBA select CLKDEV_LOOKUP select HAVE_SCHED_CLOCK select ICST select GENERIC_CLOCKEVENTS select ARCH_WANT_OPTIONAL_GPIOLIB select PLAT_VERSATILE select PLAT_VERSATILE_CLCD select ARM_TIMER_SP804 select GPIO_PL061 if GPIOLIB help Loading @@ -257,11 +258,12 @@ config ARCH_VERSATILE select ARM_AMBA select ARM_VIC select CLKDEV_LOOKUP select HAVE_SCHED_CLOCK select ICST select GENERIC_CLOCKEVENTS select ARCH_WANT_OPTIONAL_GPIOLIB select PLAT_VERSATILE select PLAT_VERSATILE_CLCD select PLAT_VERSATILE_FPGA_IRQ select ARM_TIMER_SP804 help This enables support for ARM Ltd Versatile board. Loading @@ -274,9 +276,10 @@ config ARCH_VEXPRESS select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select HAVE_CLK select HAVE_SCHED_CLOCK select HAVE_PATA_PLATFORM select ICST select PLAT_VERSATILE select PLAT_VERSATILE_CLCD help This enables support for the ARM Ltd Versatile Express boards. Loading Loading @@ -1008,6 +1011,7 @@ source "arch/arm/mach-ux500/Kconfig" source "arch/arm/mach-versatile/Kconfig" source "arch/arm/mach-vexpress/Kconfig" source "arch/arm/plat-versatile/Kconfig" source "arch/arm/mach-vt8500/Kconfig" Loading
arch/arm/include/asm/localtimer.h +7 −1 Original line number Diff line number Diff line Loading @@ -44,8 +44,14 @@ int local_timer_ack(void); /* * Setup a local timer interrupt for a CPU. */ void local_timer_setup(struct clock_event_device *); int local_timer_setup(struct clock_event_device *); #else static inline int local_timer_setup(struct clock_event_device *evt) { return -ENXIO; } #endif #endif
arch/arm/include/asm/outercache.h +8 −6 Original line number Diff line number Diff line Loading @@ -21,6 +21,8 @@ #ifndef __ASM_OUTERCACHE_H #define __ASM_OUTERCACHE_H #include <linux/types.h> struct outer_cache_fns { void (*inv_range)(unsigned long, unsigned long); void (*clean_range)(unsigned long, unsigned long); Loading @@ -38,17 +40,17 @@ struct outer_cache_fns { extern struct outer_cache_fns outer_cache; static inline void outer_inv_range(unsigned long start, unsigned long end) static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) { if (outer_cache.inv_range) outer_cache.inv_range(start, end); } static inline void outer_clean_range(unsigned long start, unsigned long end) static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) { if (outer_cache.clean_range) outer_cache.clean_range(start, end); } static inline void outer_flush_range(unsigned long start, unsigned long end) static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) { if (outer_cache.flush_range) outer_cache.flush_range(start, end); Loading @@ -74,11 +76,11 @@ static inline void outer_disable(void) #else static inline void outer_inv_range(unsigned long start, unsigned long end) static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) { } static inline void outer_clean_range(unsigned long start, unsigned long end) static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) { } static inline void outer_flush_range(unsigned long start, unsigned long end) static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) { } static inline void outer_flush_all(void) { } static inline void outer_inv_all(void) { } Loading
arch/arm/include/asm/pgtable.h +2 −1 Original line number Diff line number Diff line Loading @@ -301,6 +301,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; #define pgd_present(pgd) (1) #define pgd_clear(pgdp) do { } while (0) #define set_pgd(pgd,pgdp) do { } while (0) #define set_pud(pud,pudp) do { } while (0) /* Find an entry in the second-level page table.. */ Loading Loading @@ -351,7 +352,7 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) #define pte_unmap(pte) __pte_unmap(pte) #define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT) #define pfn_pte(pfn,prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) #define pfn_pte(pfn,prot) __pte(__pfn_to_phys(pfn) | pgprot_val(prot)) #define pte_page(pte) pfn_to_page(pte_pfn(pte)) #define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot) Loading
arch/arm/include/asm/setup.h +1 −1 Original line number Diff line number Diff line Loading @@ -195,7 +195,7 @@ static struct tagtable __tagtable_##fn __tag = { tag, fn } #define NR_BANKS 8 struct membank { unsigned long start; phys_addr_t start; unsigned long size; unsigned int highmem; }; Loading