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Commit 192505bd authored by Wolfgang Grandegger's avatar Wolfgang Grandegger Committed by Ben Dooks
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powerpc: doc/dts-bindings: update doc of FSL I2C bindings



This patch adds the MPC5121 to the list of supported devices,
enhances the doc of the "clock-frequency" property and removes
the obsolete "cell-index", "device_type" and "fsl-i2c" property.
Furthermore an example for the MPC5121 has been added.

Signed-off-by: default avatarWolfgang Grandegger <wg@denx.de>
Reviewed-by: default avatarWolfram Sang <w.sang@pengutronix.de>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
parent f00d738f
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+22 −8
Original line number Original line Diff line number Diff line
@@ -2,15 +2,14 @@


Required properties :
Required properties :


 - device_type : Should be "i2c"
 - reg : Offset and length of the register set for the device
 - reg : Offset and length of the register set for the device
 - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a
   compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
   mpc5200 or mpc5200b. For the mpc5121, an additional node
   "fsl,mpc5121-i2c-ctrl" is required as shown in the example below.


Recommended properties :
Recommended properties :


 - compatible : compatibility list with 2 entries, the first should
   be "fsl,CHIP-i2c" where CHIP is the name of a compatible processor,
   e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
   should be "fsl-i2c".
 - interrupts : <a b> where a is the interrupt number and b is a
 - interrupts : <a b> where a is the interrupt number and b is a
   field that represents an encoding of the sense and level
   field that represents an encoding of the sense and level
   information for the interrupt.  This should be encoded based on
   information for the interrupt.  This should be encoded based on
@@ -24,25 +23,40 @@ Recommended properties :


Examples :
Examples :


	/* MPC5121 based board */
	i2c@1740 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "fsl,mpc5121-i2c", "fsl-i2c";
		reg = <0x1740 0x20>;
		interrupts = <11 0x8>;
		interrupt-parent = <&ipic>;
		clock-frequency = <100000>;
	};

	i2ccontrol@1760 {
		compatible = "fsl,mpc5121-i2c-ctrl";
		reg = <0x1760 0x8>;
	};

	/* MPC5200B based board */
	i2c@3d00 {
	i2c@3d00 {
		#address-cells = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		#size-cells = <0>;
		compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
		compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
		cell-index = <0>;
		reg = <0x3d00 0x40>;
		reg = <0x3d00 0x40>;
		interrupts = <2 15 0>;
		interrupts = <2 15 0>;
		interrupt-parent = <&mpc5200_pic>;
		interrupt-parent = <&mpc5200_pic>;
		fsl,preserve-clocking;
		fsl,preserve-clocking;
	};
	};


	/* MPC8544 base board */
	i2c@3100 {
	i2c@3100 {
		#address-cells = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		#size-cells = <0>;
		cell-index = <1>;
		compatible = "fsl,mpc8544-i2c", "fsl-i2c";
		compatible = "fsl,mpc8544-i2c", "fsl-i2c";
		reg = <0x3100 0x100>;
		reg = <0x3100 0x100>;
		interrupts = <43 2>;
		interrupts = <43 2>;
		interrupt-parent = <&mpic>;
		interrupt-parent = <&mpic>;
		clock-frequency = <400000>;
		clock-frequency = <400000>;
	};
	};