Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 18db4fe0 authored by Omar Ramirez Luna's avatar Omar Ramirez Luna Committed by Greg Kroah-Hartman
Browse files

staging: tidspbridge: always compile dsp wdt code 



In order to detect it at runtime, we need the code handling wdt
clock available at runtime to decide whether to enable or disable
based on the baseimage symbols. Default timeout has been set to 5
seconds.

Downside is that we will lose the option to set a custom timeout
for overflow, but than can be added (if needed) as part of debugfs.

Signed-off-by: default avatarOmar Ramirez <omar.ramirez@ti.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 81a14956

drivers/staging/tidspbridge/Kconfig

+0 −16
Original line number Diff line number Diff line
@@ -52,22 +52,6 @@ config TIDSPBRIDGE_CACHE_LINE_CHECK 
	  This can lead to heap corruption. Say Y, to enforce the check for 128

	  byte alignment, buffers failing this check will be rejected.



config TIDSPBRIDGE_WDT3

	bool "Enable watchdog timer"

	depends on TIDSPBRIDGE

	help

	  WTD3 is managed by DSP and once it is enabled, DSP side bridge is in

	  charge of refreshing the timer before overflow, if the DSP hangs MPU

	  will caught the interrupt and try to recover DSP.



config TIDSPBRIDGE_WDT_TIMEOUT

	int "Watchdog timer timeout (in secs)"

	depends on TIDSPBRIDGE && TIDSPBRIDGE_WDT3

	default 5

	help

	   Watchdog timer timeout value, after that time if the watchdog timer

	   counter is not reset the wdt overflow interrupt will be triggered



config TIDSPBRIDGE_NTFY_PWRERR

	bool "Notify power errors"

	depends on TIDSPBRIDGE

drivers/staging/tidspbridge/core/wdt.c

+1 −23
Original line number Diff line number Diff line
@@ -25,8 +25,6 @@ 
#include <dspbridge/host_os.h>





#ifdef CONFIG_TIDSPBRIDGE_WDT3



#define OMAP34XX_WDT3_BASE 		(L4_PER_34XX_BASE + 0x30000)



static struct dsp_wdt_setting dsp_wdt;
@@ -84,7 +82,7 @@ int dsp_wdt_init(void) 
void dsp_wdt_sm_set(void *data)

{

	dsp_wdt.sm_wdt = data;

	dsp_wdt.sm_wdt->wdt_overflow = CONFIG_TIDSPBRIDGE_WDT_TIMEOUT;

	dsp_wdt.sm_wdt->wdt_overflow = 5;	/* in seconds */

}
@@ -128,23 +126,3 @@ void dsp_wdt_enable(bool enable) 
		clk_disable(dsp_wdt.fclk);

	}

}
 


#else

void dsp_wdt_enable(bool enable)

{

}



void dsp_wdt_sm_set(void *data)

{

}



int dsp_wdt_init(void)

{

	return 0;

}



void dsp_wdt_exit(void)

{

}

#endif

drivers/staging/tidspbridge/include/dspbridge/_chnl_sm.h

+0 −4
Original line number Diff line number Diff line
@@ -99,14 +99,10 @@ struct shm { 
	struct opp_rqst_struct opp_request;

	/* load monitor information structure */

	struct load_mon_struct load_mon_info;

#ifdef CONFIG_TIDSPBRIDGE_WDT3

	/* Flag for WDT enable/disable F/I clocks */

	u32 wdt_setclocks;

	u32 wdt_overflow;	/* WDT overflow time */

	char dummy[176];	/* padding to 256 byte boundary */

#else

	char dummy[184];	/* padding to 256 byte boundary */

#endif

	u32 shm_dbg_var[64];	/* shared memory debug variables */

};