Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1884af93 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branches 'imx/cleanup' and 'stericsson/cleanup' of... 

Merge branches 'imx/cleanup' and 'stericsson/cleanup' of git+ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc into next/cleanup
parents 04871e93 c21d2319

arch/arm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -830,6 +830,7 @@ config ARCH_U300 
	select HAVE_SCHED_CLOCK

	select HAVE_TCM

	select ARM_AMBA

	select ARM_PATCH_PHYS_VIRT

	select ARM_VIC

	select GENERIC_CLOCKEVENTS

	select CLKDEV_LOOKUP

arch/arm/mach-u300/Kconfig

+0 −46
Original line number Diff line number Diff line
@@ -48,39 +48,12 @@ config MACH_U300_BS365 


endchoice



choice

	prompt "Memory configuration"

	default MACH_U300_SINGLE_RAM

	---help---

	You have to config the kernel according to the physical memory

	configuration.



config MACH_U300_SINGLE_RAM

	bool "Single RAM"

	help

		Select this if you want support for Single RAM phones.



config MACH_U300_DUAL_RAM

	bool "Dual RAM"

	help

		Select this if you want support for Dual RAM phones.

		This is two RAM memories on different EMIFs.

endchoice



config U300_DEBUG

	bool "Debug support for U300"

	depends on PM

	help

		Debug support for U300 in sysfs, procfs etc.



config MACH_U300_SEMI_IS_SHARED

	bool "The SEMI is used by both the access and application side"

	depends on MACH_U300

	help

		This makes it possible to use the SEMI (Shared External

		Memory Interface) from both from access and application

		side.



config MACH_U300_SPIDUMMY

	bool "SSP/SPI dummy chip"

	select SPI
@@ -93,25 +66,6 @@ config MACH_U300_SPIDUMMY 
		you don't need it. Selecting this will activate the

		SPI framework and ARM PL022 support.



comment "All the settings below must match the bootloader's settings"



config MACH_U300_ACCESS_MEM_SIZE

       int "Access CPU memory allocation"

       range 7 25

       depends on MACH_U300_SINGLE_RAM

       default 13

       help

		How much memory in MiB that the Access side CPU has allocated



config MACH_U300_2MB_ALIGNMENT_FIX

       bool "2MiB alignment fix"

       depends on MACH_U300_SINGLE_RAM

       default y

       help

		If yes and the Access side CPU has allocated an odd size in

		MiB, this fix gives you one MiB extra that would otherwise be

		lost due to Linux 2 MiB alignment policy.



endmenu



endif

arch/arm/mach-u300/Makefile.boot

+3 −14
Original line number Diff line number Diff line 
# Note: the following conditions must always be true:

#   ZRELADDR == virt_to_phys(TEXTADDR)

#   PARAMS_PHYS must be within 4MB of ZRELADDR

#   INITRD_PHYS must be in RAM



ifdef CONFIG_MACH_U300_SINGLE_RAM

     zreladdr-y	:= 0x28E08000

  params_phys-y	:= 0x28E00100

else

   zreladdr-y	:= 0x48008000

params_phys-y	:= 0x48000100

endif



# This isn't used.

#initrd_phys-y	:= 0x29800000
 
#initrd_phys-y	:= 0x48800000

arch/arm/mach-u300/core.c

+1 −81
Original line number Diff line number Diff line
@@ -68,25 +68,6 @@ static struct map_desc u300_io_desc[] __initdata = { 
		.length		= SZ_32K,

		.type		= MT_DEVICE,

	},

	{

		.virtual	= 0xffff2000, /* TCM memory */

		.pfn		= __phys_to_pfn(0xffff2000),

		.length		= SZ_16K,

		.type		= MT_DEVICE,

	},



	/*

	 * This overlaps with the IRQ vectors etc at 0xffff0000, so these

	 * may have to be moved to 0x00000000 in order to use the ROM.

	 */

	/*

	{

		.virtual	= U300_BOOTROM_VIRT_BASE,

		.pfn		= __phys_to_pfn(U300_BOOTROM_PHYS_BASE),

		.length		= SZ_64K,

		.type		= MT_ROM,

	},

	*/

};



void __init u300_map_io(void)
@@ -361,51 +342,6 @@ static struct resource wdog_resources[] = { 
	}

};



/* TODO: These should be protected by suitable #ifdef's */

static struct resource ave_resources[] = {

	{

		.name  = "AVE3e I/O Area",

		.start = U300_VIDEOENC_BASE,

		.end   = U300_VIDEOENC_BASE + SZ_512K - 1,

		.flags = IORESOURCE_MEM,

	},

	{

		.name  = "AVE3e IRQ0",

		.start = IRQ_U300_VIDEO_ENC_0,

		.end   = IRQ_U300_VIDEO_ENC_0,

		.flags = IORESOURCE_IRQ,

	},

	{

		.name  = "AVE3e IRQ1",

		.start = IRQ_U300_VIDEO_ENC_1,

		.end   = IRQ_U300_VIDEO_ENC_1,

		.flags = IORESOURCE_IRQ,

	},

	{

		.name  = "AVE3e Physmem Area",

		.start = 0, /* 0 will be remapped to reserved memory */

		.end   = SZ_1M - 1,

		.flags = IORESOURCE_MEM,

	},

	/*

	 * The AVE3e requires two regions of 256MB that it considers

	 * "invisible". The hardware will not be able to access these

	 * addresses, so they should never point to system RAM.

	 */

	{

		.name  = "AVE3e Reserved 0",

		.start = 0xd0000000,

		.end   = 0xd0000000 + SZ_256M - 1,

		.flags = IORESOURCE_MEM,

	},

	{

		.name  = "AVE3e Reserved 1",

		.start = 0xe0000000,

		.end   = 0xe0000000 + SZ_256M - 1,

		.flags = IORESOURCE_MEM,

	},

};



static struct resource dma_resource[] = {

	{

		.start = U300_DMAC_BASE,
@@ -1612,13 +1548,6 @@ static struct platform_device nand_device = { 
	},

};



static struct platform_device ave_device = {

	.name = "video_enc",

	.id = -1,

	.num_resources = ARRAY_SIZE(ave_resources),

	.resource = ave_resources,

};



static struct platform_device dma_device = {

	.name		= "coh901318",

	.id		= -1,
@@ -1643,10 +1572,8 @@ static struct platform_device *platform_devs[] __initdata = { 
	&gpio_device,

	&nand_device,

	&wdog_device,

	&ave_device

};





/*

 * Interrupts: the U300 platforms have two pl190 ARM PrimeCells connected

 * together so some interrupts are connected to the first one and some
@@ -1837,17 +1764,10 @@ void __init u300_init_devices(void) 
	/* Register subdevices on the SPI bus */

	u300_spi_register_board_devices();



#ifndef CONFIG_MACH_U300_SEMI_IS_SHARED

	/*

	 * Enable SEMI self refresh. Self-refresh of the SDRAM is entered when

	 * both subsystems are requesting this mode.

	 * If we not share the Acc SDRAM, this is never the case. Therefore

	 * enable it here from the App side.

	 */

	/* Enable SEMI self refresh */

	val = readw(U300_SYSCON_VBASE + U300_SYSCON_SMCR) |

		U300_SYSCON_SMCR_SEMI_SREFREQ_ENABLE;

	writew(val, U300_SYSCON_VBASE + U300_SYSCON_SMCR);

#endif /* CONFIG_MACH_U300_SEMI_IS_SHARED */

}



static int core_module_init(void)

arch/arm/mach-u300/include/mach/memory.h

+2 −20
Original line number Diff line number Diff line
@@ -13,26 +13,8 @@ 
#ifndef __MACH_MEMORY_H

#define __MACH_MEMORY_H



#ifdef CONFIG_MACH_U300_DUAL_RAM



#define PLAT_PHYS_OFFSET	UL(0x48000000)

#define BOOT_PARAMS_OFFSET	(PHYS_OFFSET + 0x100)



#else



#ifdef CONFIG_MACH_U300_2MB_ALIGNMENT_FIX

#define PLAT_PHYS_OFFSET (0x28000000 + \

	     (CONFIG_MACH_U300_ACCESS_MEM_SIZE - \

	     (CONFIG_MACH_U300_ACCESS_MEM_SIZE & 1))*1024*1024)

#else

#define PLAT_PHYS_OFFSET (0x28000000 + \

	     (CONFIG_MACH_U300_ACCESS_MEM_SIZE +	\

	     (CONFIG_MACH_U300_ACCESS_MEM_SIZE & 1))*1024*1024)

#endif

#define BOOT_PARAMS_OFFSET (0x28000000 + \

	    (CONFIG_MACH_U300_ACCESS_MEM_SIZE +		\

	    (CONFIG_MACH_U300_ACCESS_MEM_SIZE & 1))*1024*1024 + 0x100)

#endif

#define BOOT_PARAMS_OFFSET	(PLAT_PHYS_OFFSET + 0x100)



/*

 * We enable a real big DMA buffer if need be.